- 51e9742 [VTA][Relay] Extending Vision model coverage compilation for VTA (#3740) by Thierry Moreau · 4 years, 8 months ago
- 94311b3 [VTA] de10-nano driver (#3394) by Liangfu Chen · 4 years, 8 months ago
- db39351 [VTA][Chisel] add ISA BitPat generation (#3891) by Luis Vega · 4 years, 8 months ago
- 6e9e970 [VTA][Chisel] add scalafmt and format existing scala codebase (#3880) by Luis Vega · 4 years, 8 months ago
- 43a353c [VTA] Fix TSIM compile error in Linux (add missing -fPIC flag) (#3876) by Liangfu Chen · 4 years, 8 months ago
- 8fe1c05 [VTA][Chisel] rename USE_TSIM macro with USE_VTA64 and cleanup runtime (#3872) by Luis Vega · 4 years, 8 months ago
- d441887 [VTA][TSIM] add virtual memory support to tsim example (#3868) by Luis Vega · 4 years, 9 months ago
- a3049d0 [VTA] Fix RewriteForceSerial Function logic issue. (#3854) by Hua Jiang · 4 years, 9 months ago
- ef5a7d0 [VTA] Parameterization and bug fix in TensorLoad module (#3841) by Liangfu Chen · 4 years, 9 months ago
- 9eff1d2 [VTA][TSIM] Introduce Virtual Memory for TSIM Driver (#3686) by Liangfu Chen · 4 years, 9 months ago
- 1a207bf [VTA][TSIM] parallel TSIM hardware compilation with macOS and debug support (#3797) by Liangfu Chen · 4 years, 9 months ago
- f46cb55 [VTA][Chisel] scale dram base address in hardware instead of runtime (#3772) by Luis Vega · 4 years, 9 months ago
- d022b73 fix dense tuning (#3768) by Thierry Moreau · 4 years, 9 months ago
- 64459d6 syntax fix (#3765) by Benjamin Tu · 4 years, 9 months ago
- 0c7843c [VTA][Chisel] run all unittests by default (#3766) by Luis Vega · 4 years, 9 months ago
- 5c7868a [VTA][TSIM][Build] Towards TSIM CI testing (#3704) by Thierry Moreau · 4 years, 9 months ago
- fc9ae85 [VTA] [Chisel] Improved Data Gen, Added ALU Test (#3743) by Benjamin Tu · 4 years, 9 months ago
- 4241739 [VTA] [Chisel] Bug fix for VME Shell (#3737) by Benjamin Tu · 4 years, 9 months ago
- b18c28d [VTA][Dockerfile] Chisel dependencies for TSIM CI (#3721) by Thierry Moreau · 4 years, 9 months ago
- c3894cb safe to remove thread related headers? (#3713) by Liangfu Chen · 4 years, 9 months ago
- 436d23b [VTA] [Chisel] Added Chisel Module Unit Test Infrastructure (#3698) by Benjamin Tu · 4 years, 10 months ago
- 3563047 [VTA] VTA Compilation Script for Intel FPGA (#3494) by Liangfu Chen · 4 years, 10 months ago
- 255d9b2 [VTA] Support for batched inference (#3661) by Thierry Moreau · 4 years, 10 months ago
- cffabb0 removing deprecated script (#3667) by Thierry Moreau · 4 years, 10 months ago
- 5bff873 [VTA] [Chisel] make dram offset configurable for uops different than 4-bytes (#3654) by Luis Vega · 4 years, 10 months ago
- dd4ca23 [VTA] Refactor to increase platform coverage (Ultra96 etc.) (#3496) by Thierry Moreau · 4 years, 10 months ago
- 0917860 fix comment/doc in TensorLoad (#3646) by Luis Vega · 4 years, 10 months ago
- aacd35a fix case when offset is odd and size is even (#3643) by Luis Vega · 4 years, 10 months ago
- c9ac0c2 [VTA] [Chisel] fix tensor issue/commit in gemm (#3637) by Luis Vega · 4 years, 10 months ago
- 7b0123f [VTA] [Chisel] support for different inp/wgt bits, rewrote DotProduct for clarity (#3605) by Benjamin Tu · 4 years, 10 months ago
- 2aad7f3 remove tabs (#3603) by Luis Vega · 4 years, 10 months ago
- 6c41083 [VTA] Runtime refactor to allow for non-shared memory FPGAs (e.g. F1) (#3554) by Thierry Moreau · 4 years, 10 months ago
- 8a27e11 add coherent, length, and user bits option to Shell Config (#3593) by Luis Vega · 4 years, 10 months ago
- 5b6eb69 bugfix function args order in alu instruction generation (#3592) by Luis Vega · 4 years, 10 months ago
- 5f3f2b6 avoiding cast None to int errors (#3578) by Thierry Moreau · 4 years, 10 months ago
- 2d42612 fix pynq 32-bit address pointers (#3558) by Luis Vega · 4 years, 10 months ago
- a836413 Fix pylint issue in vta/python/vta/top/graphpack.py (#3519) by Ramana Radhakrishnan · 4 years, 10 months ago
- b01a87b [VTA] TSIM improvements and fixes (#3505) by Luis Vega · 4 years, 10 months ago
- 1cad4c6 [relay][frontend] Return Module from get_workload (#3483) by Zhi · 4 years, 10 months ago
- 33b2f06 [VTA][Hotfix] Avoiding error when environment variable is not set (#3497) by Thierry Moreau · 4 years, 10 months ago
- 4b85cbe producing simulation statistics instead of time to get useful information out of simulation runs (#3481) by Thierry Moreau · 4 years, 11 months ago
- 669aa86 Clean up pass.h (#3312) by Zhi · 4 years, 11 months ago
- dacd7b6 [VTA][Relay] Relay Compilation + AutoTVM compatible operator libraries for VTA (#3135) by Thierry Moreau · 4 years, 11 months ago
- 0816033 [VTA][TSIM] Verilator compile report error for printf (#3438) by Hua Jiang · 4 years, 11 months ago
- 5d228cf [VTA] Add VTA PYNQ metal_test bitstream program logic and fix compile issue. (#3400) by Hua Jiang · 4 years, 11 months ago
- 1ac6213 [VTA] [APPS] Update README on tsim example (#3409) by Luis Vega · 5 years ago
- 3455ef3 [VTA] Fix VTA function Vivado Compile Error. (#3375) by Hua Jiang · 5 years ago
- 453b73c fix hardware-makefile for osx, bugfix chisel-RegFile, and rename driver (#3371) by Luis Vega · 5 years ago
- 91026e7 [VTA] add support to event counters (#3347) by Luis Vega · 5 years ago
- c5ebbe7 [VTA][TSIM] update app example (#3343) by Luis Vega · 5 years ago
- 82686b9 add another default location to verilator (#3324) by Luis Vega · 5 years ago
- fa0aa6c [VTA] [APPS] [TSIM] update documentation (README) (#3318) by Luis Vega · 5 years ago
- 30b183e [VTA] add doc to tsim-example driver and update verilator env variable (#3302) by Luis Vega · 5 years ago
- da299fc [VTA] [APPS] [TSIM] small naming fix (#3293) by Luis Vega · 5 years ago
- 2f24e4a [VTA] [Hardware] Chisel implementation (#3258) by Luis Vega · 5 years ago
- fbd494d [Bugfix] [VTA] VTA DRAM Have A Logic Issue May Cause GEMM Output Wrong. (#3278) by Hua · 5 years ago
- 3c23363 [Bugfix][VTA] PkgConfig cause crash in PYNQ board due to link library (#3257) by Hua · 5 years ago
- 302637c [BugFix][VTA] Fix vta_conv2d crash issue after change vta_config.json configuration. (#3213) by Hua · 5 years ago
- 7b92c80 [VTA][TSIM] Use Module instead of RawModule for testbench by creating an empty bundle for the IO (#3242) by Luis Vega · 5 years ago
- 5c5f57b [VTA] [TSIM] Improve tsim example (#3206) by Luis Vega · 5 years ago
- 08c4c3f [BugFix][VTA] Fix bug in vta runtime DepPop function. (#3208) by Hua · 5 years ago
- 58f070f [RFC] [VTA] [TSIM] Enabling Cycle-Accurate Hardware Simulation for VTA #3009 (#3010) by Luis Vega · 5 years ago
- 01f1246 [HEADER] Add Header to Comply with ASF Release Policy (#2982) by Tianqi Chen · 5 years ago
- f088ab3 Stop pylint complaining about useless import alias. (#2655) by Marcus Shawcroft · 5 years ago
- 5c49b07 Fix pylint 2.2.2 gripes. (#2642) by Marcus Shawcroft · 5 years ago
- 282c063 [TUTORIAL] Fix downloaded file path (#2590) by MORITA Kazutaka · 5 years ago
- 45fdee0 Misc refactor on graph runtime, layout node (#2557) by Tianqi Chen · 5 years ago
- 43110a8 Optimize Linux shared library modules (*.so files) (#2445) by Anthony Mai · 5 years ago
- 417a562 [RELAY][EXPR] Make const numpy consistent (#2349) by Tianqi Chen · 5 years ago
- 9bef80c [VTA] Improved RPC for VTA (#2043) by Liangfu Chen · 6 years ago
- 0fc5812 [TOPI] Add dilation argument to conv2d and depthwise_conv2d (#1970) by Wuwei Lin · 6 years ago
- 9ab4128 [TOPI] Specify non-zero absolute tolerance in tests (#1925) by Sergey Mironov · 6 years ago
- 6500bb3 [VTA] pynq v2.1 -> v2.3 (#1945) by Thierry Moreau · 6 years ago
- 400a742 [RUNTIME] Add fp16/fp32 conversion functions (#1766) by Lianmin Zheng · 6 years ago
- 51ea5c7 [DOC]Errors corrected (#1767) by Siju · 6 years ago
- 8dac6f5 Fix VTA Tutorial for more strict graphrt check (#1737) by Tianqi Chen · 6 years ago
- 3af21a6 [SUBMODULE] update submodule to latest (#1728) by Tianqi Chen · 6 years ago
- 5840887 Remove leading "./" from include paths (#1640) by MORITA Kazutaka · 6 years ago
- 7159d47 [AUTOTVM] Simplify TopHub (#1630) by Lianmin Zheng · 6 years ago
- 43ce06b [AUTOTVM] TOPI integration for ARM CPU (#1487) by Lianmin Zheng · 6 years ago
- d54df27 [VTA] bugfix parameter derivation (#1521) by Thierry Moreau · 6 years ago
- 53748b6 [NNVM] Fix check in layout parsing (#1502) by Tianqi Chen · 6 years ago
- 3e974cc timing closure fix for default VTA config (#1489) by Thierry Moreau · 6 years ago
- 1c4dfbb [DOC] Update VTA readme files to avoid stale information (#1484) by Thierry Moreau · 6 years ago
- f8a36c6 [IR] support general type annotation. (#1480) by Tianqi Chen · 6 years ago
- 978c739 [DOC, HARDWARE] Hardware developer guide, migrating to use Vivado 2018.2 (#1473) by Thierry Moreau · 6 years ago
- a7df108 Update VTA schedule (#1464) by Tianqi Chen · 6 years ago
- 1bf7d24 [DOCS] VTA installation guide (#1428) by Thierry Moreau · 6 years ago
- d5d1f74 [BUILD][DOCS] Migrate VTA CI, test, build, docs by tqchen · 6 years ago
- ea9e519 [TOPI] Fix the CPU op perf (#56) by Tianqi Chen · 6 years ago
- 9c9a165 [TUTORIAL] Resnet-18 end to end tutorial example (#55) by Thierry Moreau · 6 years ago
- 32dc7f0 [NNVM] Make param file python version agnostic by Tianqi Chen · 6 years ago
- 27c8b6f [TVM] Upgrade TVM Support by Tianqi Chen · 6 years ago
- 404bf26 [DOC, TVM] ResNet tutorial, updated TVM (#51) by Thierry Moreau · 6 years ago
- 4e035be [DOCKER] Cleanup docker image (#50) by Tianqi Chen · 6 years ago
- 4f79ec9 [UTILS, DOC] Use TVM file downloading utility, conv2d tutorial (#48) by Thierry Moreau · 6 years ago
- 8641bf5 [DOC] VTA installation & basic tutorials (#47) by Thierry Moreau · 6 years ago
- 270e9be Update Jenkinsfile by Tianqi Chen · 6 years ago
- 013dd45 Update TVM Version and CI scripts (#46) by Tianqi Chen · 6 years ago
- da3568a VTA and TVM on PYTHONPATH, also pass to sudo (#42) by Yaman Umuroglu · 6 years ago