commit	a3049d08ba42fc7dbab43a065f8073aaa5660be2	[log] [tgz]
author	Hua Jiang <huaj@xilinx.com>	Thu Aug 29 10:48:42 2019 -0700
committer	Thierry Moreau <moreau@uw.edu>	Thu Aug 29 10:48:42 2019 -0700
tree	6fc6c02540431724b6992ed25310bdfa77b6eb83
parent	ef5a7d0799b921443f353463c19891f3e44c65b0 [diff]

[VTA] Fix RewriteForceSerial Function logic issue. (#3854)

Issue:
RewriteForceSerial is a debug function to force instructions
to be serialize instead of parrallel running, by doing so we
can isolate some parallel problem or do performance compare
between parallel and serialize. But this function have some
problem, once get enabled by set debug flag, vta would stuck
when running on pynq board.

Analysis:
once enable RewriteForceSerial, the dependency logic is different
with default one, but we still use same logic to generate FINISH
and other logic, this would cause dead lock.

Solution:
give a different dependency settings when enable RewriteForceSerial.

src/runtime.cc[diff]

1 file changed

tree: 6fc6c02540431724b6992ed25310bdfa77b6eb83

README.md

VTA: Open, Modular, Deep Learning Accelerator Stack

VTA (versatile tensor accelerator) is an open-source deep learning accelerator complemented with an end-to-end TVM-based compiler stack.

The key features of VTA include:

Generic, modular, open-source hardware
- Streamlined workflow to deploy to FPGAs.
- Simulator support to prototype compilation passes on regular workstations.
Driver and JIT runtime for both simulator and FPGA hardware back-end.
End-to-end TVM stack integration
- Direct optimization and deployment of models from deep learning frameworks via TVM.
- Customized and extensible TVM compiler back-end.
- Flexible RPC support to ease deployment, and program FPGAs with the convenience of Python.

Learn more about VTA here.