| diff -ur misc/nss-3.25/nss/lib/freebl/Makefile misc/build/nss-3.25/nss/lib/freebl/Makefile |
| --- misc/nss-3.25/nss/lib/freebl/Makefile 2016-06-20 10:11:28.000000000 -0700 |
| +++ misc/build/nss-3.25/nss/lib/freebl/Makefile 2016-07-14 23:52:19.135925000 -0700 |
| @@ -153,8 +153,8 @@ |
| # The Intel AES assembly code requires Visual C++ 2010. |
| # if $(_MSC_VER) >= 1600 (Visual C++ 2010) |
| ifeq ($(firstword $(sort $(_MSC_VER) 1600)),1600) |
| - DEFINES += -DUSE_HW_AES -DINTEL_GCM |
| - ASFILES += intel-aes-x86-masm.asm intel-gcm-x86-masm.asm |
| + #DEFINES += -DUSE_HW_AES -DINTEL_GCM |
| + #ASFILES += intel-aes-x86-masm.asm intel-gcm-x86-masm.asm |
| EXTRA_SRCS += intel-gcm-wrap.c |
| ifeq ($(CLANG_CL),1) |
| INTEL_GCM_CLANG_CL = 1 |
| @@ -221,10 +221,10 @@ |
| DEFINES += -DMP_IS_LITTLE_ENDIAN |
| # DEFINES += -DMPI_AMD64_ADD |
| # comment the next four lines to turn off Intel HW acceleration. |
| - DEFINES += -DUSE_HW_AES -DINTEL_GCM |
| - ASFILES += intel-aes.s intel-gcm.s |
| - EXTRA_SRCS += intel-gcm-wrap.c |
| - INTEL_GCM = 1 |
| + #DEFINES += -DUSE_HW_AES -DINTEL_GCM |
| + #ASFILES += intel-aes.s intel-gcm.s |
| + EXTRA_SRCS += intel-gcm-wrap.c |
| + INTEL_GCM = 1 |
| MPI_SRCS += mpi_amd64.c mp_comba.c |
| endif |
| ifeq ($(CPU_ARCH),x86) |
