| /**************************************************************************** |
| * boards/arm/stm32/nucleo-f303ze/include/board.h |
| * |
| * Licensed to the Apache Software Foundation (ASF) under one or more |
| * contributor license agreements. See the NOTICE file distributed with |
| * this work for additional information regarding copyright ownership. The |
| * ASF licenses this file to you under the Apache License, Version 2.0 (the |
| * "License"); you may not use this file except in compliance with the |
| * License. You may obtain a copy of the License at |
| * |
| * http://www.apache.org/licenses/LICENSE-2.0 |
| * |
| * Unless required by applicable law or agreed to in writing, software |
| * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| * License for the specific language governing permissions and limitations |
| * under the License. |
| * |
| ****************************************************************************/ |
| |
| #ifndef __BOARDS_ARM_STM32_NUCLEO_F303ZE_INCLUDE_BOARD_H |
| #define __BOARDS_ARM_STM32_NUCLEO_F303ZE_INCLUDE_BOARD_H |
| |
| /**************************************************************************** |
| * Included Files |
| ****************************************************************************/ |
| |
| #include <nuttx/config.h> |
| |
| #ifndef __ASSEMBLY__ |
| # include <stdint.h> |
| # include <stdbool.h> |
| #endif |
| |
| /**************************************************************************** |
| * Pre-processor Definitions |
| ****************************************************************************/ |
| |
| /* Clocking *****************************************************************/ |
| |
| /* HSI - Internal 8 MHz RC Oscillator |
| * LSI - 32 KHz RC |
| * HSE - 8 MHz from MCO output of ST-LINK |
| * LSE - 32.768 kHz |
| */ |
| |
| #define STM32_BOARD_XTAL 8000000ul /* X1 on board */ |
| |
| #define STM32_HSEBYP_ENABLE |
| #define STM32_HSI_FREQUENCY 8000000ul |
| #define STM32_LSI_FREQUENCY 40000 /* Between 30kHz and 60kHz */ |
| #define STM32_HSE_FREQUENCY STM32_BOARD_XTAL |
| #define STM32_LSE_FREQUENCY 32768 /* X2 on board */ |
| |
| /* PLL source is HSE/1, PLL multipler is 9: |
| * PLL frequency is 8MHz (XTAL) x 9 = 72MHz |
| */ |
| |
| #define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC |
| #define STM32_CFGR_PLLXTPRE 0 |
| #define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9 |
| #define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL) |
| |
| /* Use the PLL and set the SYSCLK source to be the PLL */ |
| |
| #define STM32_SYSCLK_SW RCC_CFGR_SW_PLL |
| #define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL |
| #define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY |
| |
| /* AHB clock (HCLK) is SYSCLK (72MHz) */ |
| |
| #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK |
| #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY |
| |
| /* APB2 clock (PCLK2) is HCLK (72MHz) */ |
| |
| #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK |
| #define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY |
| #define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 1 and 8, 15-17 */ |
| |
| /* APB2 timers 1 and 8, 15-17 will receive PCLK2. */ |
| |
| /* Timers driven from APB2 will be PCLK2 */ |
| |
| #define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) |
| #define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) |
| #define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY) |
| #define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY) |
| #define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY) |
| |
| /* APB1 clock (PCLK1) is HCLK/2 (36MHz) */ |
| |
| #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 |
| #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) |
| |
| /* APB1 timers 2-7 will be twice PCLK1 */ |
| |
| #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| |
| /* USB divider -- Divide PLL clock by 1.5 */ |
| |
| #define STM32_CFGR_USBPRE 0 |
| |
| /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx |
| * otherwise frequency is 2xAPBx. |
| * Note: TIM1,8 are on APB2, others on APB1 |
| */ |
| |
| #define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY |
| #define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY |
| |
| /* LED definitions **********************************************************/ |
| |
| /* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, |
| * LD2 a Blue LED and LD3 a Red LED, that can be controlled by software. |
| * The following definitions assume the default Solder Bridges are installed. |
| * |
| * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs |
| * in any way. |
| * The following definitions are used to access individual LEDs. |
| */ |
| |
| /* LED index values for use with board_userled() */ |
| |
| #define BOARD_LED1 0 |
| #define BOARD_LED2 1 |
| #define BOARD_LED3 2 |
| #define BOARD_NLEDS 3 |
| |
| #define BOARD_LED_GREEN BOARD_LED1 |
| #define BOARD_LED_BLUE BOARD_LED2 |
| #define BOARD_LED_RED BOARD_LED3 |
| |
| /* LED bits for use with board_userled_all() */ |
| |
| #define BOARD_LED1_BIT (1 << BOARD_LED1) |
| #define BOARD_LED2_BIT (1 << BOARD_LED2) |
| #define BOARD_LED3_BIT (1 << BOARD_LED3) |
| |
| /* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in |
| * include/board.h and src/stm32_leds.c. The LEDs are used to encode |
| * OS-related events as follows: |
| * |
| * |
| * SYMBOL Meaning LED state |
| * Red Green Blue |
| * ---------------------- -------------------------- ------ ------ ---- |
| */ |
| |
| #define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ |
| #define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */ |
| #define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */ |
| #define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */ |
| #define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */ |
| #define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */ |
| #define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */ |
| #define LED_PANIC 7 /* The system has crashed Blink OFF N/C */ |
| #define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */ |
| |
| /* Button definitions *******************************************************/ |
| |
| /* The NUCLEO board supports one button: Pushbutton B1, labeled "User", is |
| * connected to GPIO PC13. A high value will be sensed when the button is |
| * depressed. |
| */ |
| |
| #define BUTTON_USER 0 |
| #define NUM_BUTTONS 1 |
| |
| #define BUTTON_USER_BIT (1 << BUTTON_USER) |
| |
| /* Alternate function pin selections ****************************************/ |
| |
| /* USART3 (Nucleo Virtual Console) */ |
| |
| #define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */ |
| #define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */ |
| |
| /* I2C1 Use Nucleo I2C1 pins */ |
| |
| #define GPIO_I2C1_SCL GPIO_I2C1_SCL_3 /* PB8 - D15 */ |
| #define GPIO_I2C1_SDA GPIO_I2C1_SDA_3 /* PB9 - D14 */ |
| |
| /* I2C2 Use Nucleo I2C2 pins */ |
| |
| #define GPIO_I2C2_SCL GPIO_I2C2_SCL_2 /* PF1 - D69 */ |
| #define GPIO_I2C2_SDA GPIO_I2C2_SDA_2 /* PF0 - D68 */ |
| #define GPIO_I2C2_SMBA GPIO_I2C2_SMBA_2 /* PF2 - D70 */ |
| |
| /* DMA **********************************************************************/ |
| |
| #define ADC1_DMA_CHAN DMACHAN_ADC1 |
| #define ADC3_DMA_CHAN DMACHAN_ADC3 |
| |
| #endif /* __BOARDS_ARM_STM32_NUCLEO_F303ZE_INCLUDE_BOARD_H */ |
