| /**************************************************************************** |
| * boards/arm/stm32/mikroe-stm32f4/include/board.h |
| * |
| * Licensed to the Apache Software Foundation (ASF) under one or more |
| * contributor license agreements. See the NOTICE file distributed with |
| * this work for additional information regarding copyright ownership. The |
| * ASF licenses this file to you under the Apache License, Version 2.0 (the |
| * "License"); you may not use this file except in compliance with the |
| * License. You may obtain a copy of the License at |
| * |
| * http://www.apache.org/licenses/LICENSE-2.0 |
| * |
| * Unless required by applicable law or agreed to in writing, software |
| * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| * License for the specific language governing permissions and limitations |
| * under the License. |
| * |
| ****************************************************************************/ |
| |
| #ifndef __BOARDS_ARM_STM32_MIKROE_STM32F4_INCLUDE_BOARD_H |
| #define __BOARDS_ARM_STM32_MIKROE_STM32F4_INCLUDE_BOARD_H |
| |
| /**************************************************************************** |
| * Included Files |
| ****************************************************************************/ |
| |
| #include <nuttx/config.h> |
| |
| #ifndef __ASSEMBLY__ |
| # include <stdint.h> |
| #endif |
| |
| /**************************************************************************** |
| * Pre-processor Definitions |
| ****************************************************************************/ |
| |
| /* Clocking *****************************************************************/ |
| |
| /* The Mikroe STM32F4 Mikromedia board features a single 32kHz crystal. |
| * The main clock uses the internal 16Mhz RC oscillator. |
| * |
| * This is the canonical configuration: |
| * System Clock source :PLL (HSE) |
| * SYSCLK(Hz) :168000000 Determined by PLL configuration |
| * HCLK(Hz) :168000000 (STM32_RCC_CFGR_HPRE) |
| * AHB Prescaler :1 (STM32_RCC_CFGR_HPRE) |
| * APB1 Prescaler :4 (STM32_RCC_CFGR_PPRE1) |
| * APB2 Prescaler :2 (STM32_RCC_CFGR_PPRE2) |
| * HSI Frequency(Hz) :16000000 (STM32_HSI_FREQUENCY) |
| * PLLM :16 (STM32_PLLCFG_PLLM) |
| * PLLN :36 (STM32_PLLCFG_PLLN) |
| * PLLP :2 (STM32_PLLCFG_PLLP) |
| * PLLQ :7 (STM32_PLLCFG_PLLQ) |
| * Main regulator output voltage :Scale1 mode Needed for high speed SYSCLK |
| * Flash Latency(WS) :5 |
| * Prefetch Buffer :OFF |
| * Instruction cache :ON |
| * Data cache :ON |
| * Require 48MHz for USB OTG FS, :Enabled |
| * SDIO and RNG clock |
| */ |
| |
| /* HSI - 16 MHz RC factory-trimmed |
| * LSI - 32 KHz RC |
| * HSE - On-board crystal frequency is 8MHz |
| * LSE - 32.768 kHz |
| */ |
| |
| #define STM32_BOARD_XTAL 8000000ul |
| |
| #define STM32_HSI_FREQUENCY 16000000ul |
| #define STM32_LSI_FREQUENCY 32000 |
| #define STM32_HSE_FREQUENCY STM32_BOARD_XTAL |
| #define STM32_LSE_FREQUENCY 32768 |
| |
| /* Main PLL Configuration. |
| * |
| * PLL source is HSI |
| * PLL_VCO = (STM32_HSI_FREQUENCY / PLLM) * PLLN |
| * = (16,000,000 / 16) * 336 |
| * = 336,000,000 |
| * SYSCLK = PLL_VCO / PLLP |
| * = 336,000,000 / 2 = 168,000,000 |
| * USB OTG FS, SDIO and RNG Clock |
| * = PLL_VCO / PLLQ |
| * = 48,000,000 |
| */ |
| |
| #define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(16) |
| #define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336) |
| #define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 |
| #define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7) |
| |
| #define STM32_SYSCLK_FREQUENCY 168000000ul |
| |
| /* AHB clock (HCLK) is SYSCLK (168MHz) */ |
| |
| #define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */ |
| #define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY |
| |
| /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */ |
| |
| #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */ |
| #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4) |
| |
| /* Timers driven from APB1 will be twice PCLK1 */ |
| |
| #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| #define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) |
| |
| /* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ |
| |
| #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ |
| #define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) |
| |
| /* Timers driven from APB2 will be twice PCLK2 */ |
| |
| #define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) |
| #define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) |
| #define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) |
| #define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) |
| #define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) |
| |
| /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx |
| * otherwise frequency is 2xAPBx. |
| * Note: TIM1,8 are on APB2, others on APB1 |
| */ |
| |
| #define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY |
| #define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) |
| #define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY |
| |
| /* LED definitions **********************************************************/ |
| |
| /* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in |
| * any way. The following definitions are used to access individual LEDs. |
| */ |
| |
| /* LED index values for use with board_userled() */ |
| |
| #if 0 |
| #define BOARD_LED1 0 |
| #define BOARD_LED2 1 |
| #define BOARD_LED3 2 |
| #define BOARD_LED4 3 |
| #endif |
| #define BOARD_NLEDS 0 |
| |
| #if 0 |
| #define BOARD_LED_GREEN BOARD_LED1 |
| #define BOARD_LED_ORANGE BOARD_LED2 |
| #define BOARD_LED_RED BOARD_LED3 |
| #define BOARD_LED_BLUE BOARD_LED4 |
| |
| /* LED bits for use with board_userled_all() */ |
| |
| #define BOARD_LED1_BIT (1 << BOARD_LED1) |
| #define BOARD_LED2_BIT (1 << BOARD_LED2) |
| #define BOARD_LED3_BIT (1 << BOARD_LED3) |
| #define BOARD_LED4_BIT (1 << BOARD_LED4) |
| |
| /* If CONFIG_ARCH_LEDs is defined, |
| * then NuttX will control the 4 LEDs on board the stm32f4discovery. |
| * The following definitions describe how NuttX controls the LEDs: |
| */ |
| |
| #define LED_STARTED 0 /* LED1 */ |
| #define LED_HEAPALLOCATE 1 /* LED2 */ |
| #define LED_IRQSENABLED 2 /* LED1 + LED2 */ |
| #define LED_STACKCREATED 3 /* LED3 */ |
| #define LED_INIRQ 4 /* LED1 + LED3 */ |
| #define LED_SIGNAL 5 /* LED2 + LED3 */ |
| #define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */ |
| #define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */ |
| |
| /* Button definitions *******************************************************/ |
| |
| /* The STM32F4 Discovery supports one button: */ |
| |
| #define BUTTON_USER 0 |
| |
| #define NUM_BUTTONS 0 |
| |
| #define BUTTON_USER_BIT (1 << BUTTON_USER) |
| |
| #endif /* 0 */ |
| |
| /* Alternate function pin selections ****************************************/ |
| |
| /* UART2: |
| * |
| * The Mikroe-STM32F4 board has no on-board serial devices, but it brings out |
| * UART2 to the expansion header. |
| * (See the README.txt file for other options) |
| */ |
| |
| #define GPIO_USART2_RX GPIO_USART2_RX_2 |
| #define GPIO_USART2_TX GPIO_USART2_TX_2 |
| |
| /* PWM |
| * |
| * The STM32F4 Discovery has no real on-board PWM devices, but the board can |
| * be configured to output a pulse train using TIM4 CH2 on PD13. |
| */ |
| |
| #define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2 |
| |
| /* SPI - Onboard devices use SPI3, plus SPI2 routes to the I/O header */ |
| |
| #define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 |
| #define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 |
| #define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 |
| #define DMACHAN_SPI2_RX DMAMAP_SPI2_RX |
| #define DMACHAN_SPI2_TX DMAMAP_SPI2_TX |
| |
| #define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 |
| #define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 |
| #define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 |
| #define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_2 |
| #define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_2 |
| |
| /* Timer Inputs/Outputs (see the README.txt file for options) */ |
| |
| #define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_2 |
| #define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1 |
| |
| #define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1 |
| #define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1 |
| |
| #endif /* __BOARDS_ARM_STM32_MIKROE_STM32F4_INCLUDE_BOARD_H */ |
