| /**************************************************************************** |
| * arch/risc-v/src/mpfs/mpfs_serial.c |
| * |
| * Licensed to the Apache Software Foundation (ASF) under one or more |
| * contributor license agreements. See the NOTICE file distributed with |
| * this work for additional information regarding copyright ownership. The |
| * ASF licenses this file to you under the Apache License, Version 2.0 (the |
| * "License"); you may not use this file except in compliance with the |
| * License. You may obtain a copy of the License at |
| * |
| * http://www.apache.org/licenses/LICENSE-2.0 |
| * |
| * Unless required by applicable law or agreed to in writing, software |
| * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
| * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the |
| * License for the specific language governing permissions and limitations |
| * under the License. |
| * |
| ****************************************************************************/ |
| |
| /**************************************************************************** |
| * Included Files |
| ****************************************************************************/ |
| |
| #include <nuttx/config.h> |
| |
| #include <sys/types.h> |
| #include <stdint.h> |
| #include <stdbool.h> |
| #include <unistd.h> |
| #include <string.h> |
| #include <assert.h> |
| #include <errno.h> |
| #include <debug.h> |
| |
| #include <nuttx/irq.h> |
| #include <nuttx/arch.h> |
| #include <nuttx/fs/ioctl.h> |
| #include <nuttx/serial/serial.h> |
| |
| #ifdef CONFIG_SERIAL_TERMIOS |
| # include <termios.h> |
| #endif |
| |
| #include <arch/board/board.h> |
| |
| #include "chip.h" |
| #include "mpfs.h" |
| #include "mpfs_config.h" |
| #include "mpfs_clockconfig.h" |
| #include "riscv_internal.h" |
| |
| /**************************************************************************** |
| * Pre-processor Definitions |
| ****************************************************************************/ |
| |
| /* If we are not using the serial driver for the console, then we still must |
| * provide some minimal implementation of up_putc. |
| */ |
| |
| #ifdef USE_SERIALDRIVER |
| |
| /* Which UART with be tty0/console and which tty1? The console will always |
| * be ttyS0. If there is no console then will use the lowest numbered UART. |
| */ |
| |
| #ifdef HAVE_SERIAL_CONSOLE |
| # if defined(CONFIG_UART0_SERIAL_CONSOLE) |
| # define CONSOLE_DEV g_uart0port /* UART0 is console */ |
| # define SERIAL_CONSOLE 1 |
| # elif defined(CONFIG_UART1_SERIAL_CONSOLE) |
| # define CONSOLE_DEV g_uart1port /* UART1 is console */ |
| # define SERIAL_CONSOLE 2 |
| # elif defined(CONFIG_UART2_SERIAL_CONSOLE) |
| # define CONSOLE_DEV g_uart2port /* UART2 is console */ |
| # define SERIAL_CONSOLE 3 |
| # elif defined(CONFIG_UART3_SERIAL_CONSOLE) |
| # define CONSOLE_DEV g_uart3port /* UART3 is console */ |
| # define SERIAL_CONSOLE 4 |
| # elif defined(CONFIG_UART4_SERIAL_CONSOLE) |
| # define CONSOLE_DEV g_uart4port /* UART4 is console */ |
| # define SERIAL_CONSOLE 5 |
| # else |
| # error "I'm confused... Do we have a serial console or not?" |
| # endif |
| #else |
| # undef CONSOLE_DEV /* No console */ |
| # undef CONFIG_UART0_SERIAL_CONSOLE |
| # undef CONFIG_UART1_SERIAL_CONSOLE |
| # undef CONFIG_UART2_SERIAL_CONSOLE |
| # undef CONFIG_UART3_SERIAL_CONSOLE |
| # undef CONFIG_UART4_SERIAL_CONSOLE |
| # if defined(CONFIG_MPFS_UART0) |
| # define SERIAL_CONSOLE 1 |
| # elif defined(CONFIG_MPFS_UART1) |
| # define SERIAL_CONSOLE 2 |
| # elif defined(CONFIG_MPFS_UART2) |
| # define SERIAL_CONSOLE 3 |
| # elif defined(CONFIG_MPFS_UART3) |
| # define SERIAL_CONSOLE 4 |
| # elif defined(CONFIG_MPFS_UART4) |
| # define SERIAL_CONSOLE 5 |
| # else |
| # undef TTYS0_DEV |
| # undef TTYS1_DEV |
| # endif |
| #endif |
| |
| /* Common initialization logic will not not know that the all of the UARTs |
| * have been disabled. So, as a result, we may still have to provide |
| * stub implementations of riscv_earlyserialinit(), riscv_serialinit(), and |
| * up_putc(). |
| */ |
| |
| #ifdef HAVE_UART_DEVICE |
| |
| /**************************************************************************** |
| * Private Types |
| ****************************************************************************/ |
| |
| struct up_dev_s |
| { |
| uintptr_t uartbase; /* Base address of UART registers */ |
| uint32_t baud; /* Configured baud */ |
| uint32_t ier; /* Saved IER value */ |
| uint8_t irq; /* IRQ associated with this UART */ |
| uint8_t parity; /* 0=none, 1=odd, 2=even */ |
| uint8_t bits; /* Number of bits (7 or 8) */ |
| bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ |
| }; |
| |
| /**************************************************************************** |
| * Private Function Prototypes |
| ****************************************************************************/ |
| |
| static int up_setup(struct uart_dev_s *dev); |
| static void up_shutdown(struct uart_dev_s *dev); |
| static int up_attach(struct uart_dev_s *dev); |
| static void up_detach(struct uart_dev_s *dev); |
| static int uart_interrupt(int irq, void *context, void *arg); |
| static int up_ioctl(struct file *filep, int cmd, unsigned long arg); |
| static int up_receive(struct uart_dev_s *dev, unsigned int *status); |
| static void up_rxint(struct uart_dev_s *dev, bool enable); |
| static bool up_rxavailable(struct uart_dev_s *dev); |
| static void up_send(struct uart_dev_s *dev, int ch); |
| static void up_txint(struct uart_dev_s *dev, bool enable); |
| static bool up_txready(struct uart_dev_s *dev); |
| static bool up_txempty(struct uart_dev_s *dev); |
| |
| /**************************************************************************** |
| * Private Data |
| ****************************************************************************/ |
| |
| static const struct uart_ops_s g_uart_ops = |
| { |
| .setup = up_setup, |
| .shutdown = up_shutdown, |
| .attach = up_attach, |
| .detach = up_detach, |
| .ioctl = up_ioctl, |
| .receive = up_receive, |
| .rxint = up_rxint, |
| .rxavailable = up_rxavailable, |
| #ifdef CONFIG_SERIAL_IFLOWCONTROL |
| .rxflowcontrol = NULL, |
| #endif |
| .send = up_send, |
| .txint = up_txint, |
| .txready = up_txready, |
| .txempty = up_txempty, |
| }; |
| |
| /* I/O buffers */ |
| |
| #ifdef CONFIG_MPFS_UART0 |
| static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE]; |
| static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE]; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART1 |
| static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE]; |
| static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE]; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART2 |
| static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE]; |
| static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE]; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART3 |
| static char g_uart3rxbuffer[CONFIG_UART3_RXBUFSIZE]; |
| static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE]; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART4 |
| static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE]; |
| static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE]; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART0 |
| static struct up_dev_s g_uart0priv = |
| { |
| .uartbase = MPFS_UART0_BASE, |
| .baud = CONFIG_UART0_BAUD, |
| .irq = MPFS_IRQ_MMUART0, |
| .parity = CONFIG_UART0_PARITY, |
| .bits = CONFIG_UART0_BITS, |
| .stopbits2 = CONFIG_UART0_2STOP, |
| }; |
| |
| static uart_dev_t g_uart0port = |
| { |
| #if SERIAL_CONSOLE == 1 |
| .isconsole = 1, |
| #endif |
| .recv = |
| { |
| .size = CONFIG_UART0_RXBUFSIZE, |
| .buffer = g_uart0rxbuffer, |
| }, |
| .xmit = |
| { |
| .size = CONFIG_UART0_TXBUFSIZE, |
| .buffer = g_uart0txbuffer, |
| }, |
| .ops = &g_uart_ops, |
| .priv = &g_uart0priv, |
| }; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART1 |
| static struct up_dev_s g_uart1priv = |
| { |
| .uartbase = MPFS_UART1_BASE, |
| .baud = CONFIG_UART1_BAUD, |
| .irq = MPFS_IRQ_MMUART1, |
| .parity = CONFIG_UART1_PARITY, |
| .bits = CONFIG_UART1_BITS, |
| .stopbits2 = CONFIG_UART1_2STOP, |
| }; |
| |
| static uart_dev_t g_uart1port = |
| { |
| #if SERIAL_CONSOLE == 2 |
| .isconsole = 1, |
| #endif |
| .recv = |
| { |
| .size = CONFIG_UART1_RXBUFSIZE, |
| .buffer = g_uart1rxbuffer, |
| }, |
| .xmit = |
| { |
| .size = CONFIG_UART1_TXBUFSIZE, |
| .buffer = g_uart1txbuffer, |
| }, |
| .ops = &g_uart_ops, |
| .priv = &g_uart1priv, |
| }; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART2 |
| static struct up_dev_s g_uart2priv = |
| { |
| .uartbase = MPFS_UART2_BASE, |
| .baud = CONFIG_UART2_BAUD, |
| .irq = MPFS_IRQ_MMUART2, |
| .parity = CONFIG_UART2_PARITY, |
| .bits = CONFIG_UART2_BITS, |
| .stopbits2 = CONFIG_UART2_2STOP, |
| }; |
| |
| static uart_dev_t g_uart2port = |
| { |
| #if SERIAL_CONSOLE == 3 |
| .isconsole = 1, |
| #endif |
| .recv = |
| { |
| .size = CONFIG_UART2_RXBUFSIZE, |
| .buffer = g_uart2rxbuffer, |
| }, |
| .xmit = |
| { |
| .size = CONFIG_UART2_TXBUFSIZE, |
| .buffer = g_uart2txbuffer, |
| }, |
| .ops = &g_uart_ops, |
| .priv = &g_uart2priv, |
| }; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART3 |
| static struct up_dev_s g_uart3priv = |
| { |
| .uartbase = MPFS_UART3_BASE, |
| .baud = CONFIG_UART3_BAUD, |
| .irq = MPFS_IRQ_MMUART3, |
| .parity = CONFIG_UART3_PARITY, |
| .bits = CONFIG_UART3_BITS, |
| .stopbits2 = CONFIG_UART3_2STOP, |
| }; |
| |
| static uart_dev_t g_uart3port = |
| { |
| #if SERIAL_CONSOLE == 4 |
| .isconsole = 1, |
| #endif |
| .recv = |
| { |
| .size = CONFIG_UART3_RXBUFSIZE, |
| .buffer = g_uart3rxbuffer, |
| }, |
| .xmit = |
| { |
| .size = CONFIG_UART3_TXBUFSIZE, |
| .buffer = g_uart3txbuffer, |
| }, |
| .ops = &g_uart_ops, |
| .priv = &g_uart3priv, |
| }; |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART4 |
| static struct up_dev_s g_uart4priv = |
| { |
| .uartbase = MPFS_UART4_BASE, |
| .baud = CONFIG_UART4_BAUD, |
| .irq = MPFS_IRQ_MMUART4, |
| .parity = CONFIG_UART4_PARITY, |
| .bits = CONFIG_UART4_BITS, |
| .stopbits2 = CONFIG_UART4_2STOP, |
| }; |
| |
| static uart_dev_t g_uart4port = |
| { |
| #if SERIAL_CONSOLE == 5 |
| .isconsole = 1, |
| #endif |
| .recv = |
| { |
| .size = CONFIG_UART4_RXBUFSIZE, |
| .buffer = g_uart4rxbuffer, |
| }, |
| .xmit = |
| { |
| .size = CONFIG_UART4_TXBUFSIZE, |
| .buffer = g_uart4txbuffer, |
| }, |
| .ops = &g_uart_ops, |
| .priv = &g_uart4priv, |
| }; |
| #endif |
| |
| /**************************************************************************** |
| * Private Functions |
| ****************************************************************************/ |
| |
| /**************************************************************************** |
| * Name: up_serialin |
| ****************************************************************************/ |
| |
| static inline uint32_t up_serialin(struct up_dev_s *priv, uint32_t offset) |
| { |
| return getreg32(priv->uartbase + offset); |
| } |
| |
| /**************************************************************************** |
| * Name: up_serialout |
| ****************************************************************************/ |
| |
| static inline void up_serialout(struct up_dev_s *priv, int offset, |
| uint32_t value) |
| { |
| putreg32(value, priv->uartbase + offset); |
| } |
| |
| /**************************************************************************** |
| * Name: up_disableuartint |
| ****************************************************************************/ |
| |
| static inline void up_disableuartint(struct up_dev_s *priv, uint32_t *ier) |
| { |
| if (ier) |
| { |
| *ier = priv->ier & UART_IER_ALLIE; |
| } |
| |
| priv->ier &= ~UART_IER_ALLIE; |
| up_serialout(priv, MPFS_UART_IER_OFFSET, priv->ier); |
| } |
| |
| /**************************************************************************** |
| * Name: up_restoreuartint |
| ****************************************************************************/ |
| |
| static inline void up_restoreuartint(struct up_dev_s *priv, uint32_t ier) |
| { |
| priv->ier |= ier & UART_IER_ALLIE; |
| up_serialout(priv, MPFS_UART_IER_OFFSET, priv->ier); |
| } |
| |
| /**************************************************************************** |
| * Name: up_enablebreaks |
| ****************************************************************************/ |
| |
| static inline void up_enablebreaks(struct up_dev_s *priv, bool enable) |
| { |
| uint32_t lcr = up_serialin(priv, MPFS_UART_LCR_OFFSET); |
| |
| if (enable) |
| { |
| lcr |= UART_LCR_BC; |
| } |
| else |
| { |
| lcr &= ~UART_LCR_BC; |
| } |
| |
| up_serialout(priv, MPFS_UART_LCR_OFFSET, lcr); |
| } |
| |
| static void up_enable_uart(struct up_dev_s *priv, bool enable) |
| { |
| uint32_t clock_bit = 0; |
| uint32_t reset_bit = 0; |
| |
| switch (priv->uartbase) |
| { |
| case MPFS_UART0_BASE: |
| clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART0; |
| reset_bit = SYSREG_SOFT_RESET_CR_MMUART0; |
| break; |
| case MPFS_UART1_BASE: |
| clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART1; |
| reset_bit = SYSREG_SOFT_RESET_CR_MMUART1; |
| break; |
| case MPFS_UART2_BASE: |
| clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART2; |
| reset_bit = SYSREG_SOFT_RESET_CR_MMUART2; |
| break; |
| case MPFS_UART3_BASE: |
| clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART3; |
| reset_bit = SYSREG_SOFT_RESET_CR_MMUART3; |
| break; |
| case MPFS_UART4_BASE: |
| clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART4; |
| reset_bit = SYSREG_SOFT_RESET_CR_MMUART4; |
| break; |
| |
| default: |
| return; |
| } |
| |
| /* reset on */ |
| |
| modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SOFT_RESET_CR_OFFSET, |
| 0, reset_bit); |
| |
| if (enable) |
| { |
| /* reset off */ |
| |
| modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SUBBLK_CLOCK_CR_OFFSET, |
| 0, reset_bit); |
| |
| /* clock on */ |
| |
| modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SOFT_RESET_CR_OFFSET, |
| clock_bit, 0); |
| } |
| else |
| { |
| /* clock off */ |
| |
| modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SUBBLK_CLOCK_CR_OFFSET, |
| clock_bit, 0); |
| } |
| } |
| |
| /**************************************************************************** |
| * Name: up_config_baud_divisors |
| * |
| * Description: |
| * Configure the UART baudrate divisors. |
| * |
| ****************************************************************************/ |
| |
| static void up_config_baud_divisors(struct up_dev_s *priv, uint32_t baudrate) |
| { |
| uint32_t baud_value; |
| uint32_t baud_value_by_64; |
| uint32_t baud_value_by_128; |
| uint32_t fractional_baud_value; |
| uint64_t pclk_freq; |
| |
| pclk_freq = MPFS_MSS_APB_AHB_CLK; |
| |
| /* Compute baud value based on requested baud rate and PCLK frequency. |
| * The baud value is computed using the following equation: |
| * baud_value = PCLK_Frequency / (baud_rate * 16) |
| */ |
| |
| baud_value_by_128 = (uint32_t)((8UL * pclk_freq) / baudrate); |
| baud_value_by_64 = baud_value_by_128 / 2U; |
| baud_value = baud_value_by_64 / 64U; |
| fractional_baud_value = baud_value_by_64 - (baud_value * 64U); |
| fractional_baud_value += (baud_value_by_128 - (baud_value * 128U)) |
| - (fractional_baud_value * 2U); |
| |
| if (baud_value <= (uint32_t)UINT16_MAX) |
| { |
| up_serialout(priv, MPFS_UART_DLH_OFFSET, baud_value >> 8); |
| up_serialout(priv, MPFS_UART_DLL_OFFSET, baud_value & 0xff); |
| |
| if (baud_value > 1) |
| { |
| /* Enable Fractional baud rate */ |
| |
| uint8_t mm0 = up_serialin(priv, MPFS_UART_MM0_OFFSET); |
| mm0 |= UART_MM0_EFBR; |
| up_serialout(priv, MPFS_UART_MM0_OFFSET, mm0); |
| up_serialout(priv, MPFS_UART_DFR_OFFSET, fractional_baud_value); |
| } |
| } |
| } |
| |
| /**************************************************************************** |
| * Name: up_set_format |
| * |
| * Description: |
| * Set the serial line format and speed. |
| * |
| ****************************************************************************/ |
| |
| #ifndef CONFIG_SUPPRESS_UART_CONFIG |
| static void up_set_format(struct uart_dev_s *dev) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| uint32_t lcr = 0; |
| |
| /* Set up the LCR */ |
| |
| switch (priv->bits) |
| { |
| case 5: |
| lcr |= UART_LCR_DLS_5BITS; |
| break; |
| |
| case 6: |
| lcr |= UART_LCR_DLS_6BITS; |
| break; |
| |
| case 7: |
| lcr |= UART_LCR_DLS_7BITS; |
| break; |
| |
| case 8: |
| default: |
| lcr |= UART_LCR_DLS_8BITS; |
| break; |
| } |
| |
| if (priv->stopbits2) |
| { |
| lcr |= UART_LCR_STOP; |
| } |
| |
| if (priv->parity == 1) |
| { |
| lcr |= UART_LCR_PEN; |
| } |
| else if (priv->parity == 2) |
| { |
| lcr |= (UART_LCR_PEN | UART_LCR_EPS); |
| } |
| |
| /* Enter DLAB=1 */ |
| |
| up_serialout(priv, MPFS_UART_LCR_OFFSET, (lcr | UART_LCR_DLAB)); |
| |
| /* Set the BAUD divisor */ |
| |
| up_config_baud_divisors(priv, priv->baud); |
| |
| /* Clear DLAB */ |
| |
| up_serialout(priv, MPFS_UART_LCR_OFFSET, lcr); |
| } |
| #endif |
| |
| /**************************************************************************** |
| * Name: up_setup |
| * |
| * Description: |
| * Configure the UART baud, bits, parity, etc. This method is called the |
| * first time that the serial port is opened. |
| * |
| ****************************************************************************/ |
| |
| static int up_setup(struct uart_dev_s *dev) |
| { |
| #ifndef CONFIG_SUPPRESS_UART_CONFIG |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| |
| /* enable clock */ |
| |
| up_enable_uart(priv, true); |
| |
| /* Disable interrupts */ |
| |
| priv->ier = 0; |
| up_serialout(priv, MPFS_UART_IER_OFFSET, 0); |
| up_serialout(priv, MPFS_UART_IEM_OFFSET, 0); |
| |
| /* Clear fifos */ |
| |
| up_serialout(priv, MPFS_UART_FCR_OFFSET, |
| (UART_FCR_RFIFOR | UART_FCR_XFIFOR)); |
| |
| /* set filter to minimum value */ |
| |
| up_serialout(priv, MPFS_UART_GFR_OFFSET, 0); |
| |
| /* set default TX time guard */ |
| |
| up_serialout(priv, MPFS_UART_TTG_OFFSET, 0); |
| |
| /* Configure the UART line format and speed. */ |
| |
| up_set_format(dev); |
| |
| /* Configure the FIFOs */ |
| |
| up_serialout(priv, MPFS_UART_FCR_OFFSET, |
| (UART_FCR_RT_HALF | UART_FCR_XFIFOR | UART_FCR_RFIFOR | |
| UART_FCR_FIFOE)); |
| |
| /* Enable Auto-Flow Control in the Modem Control Register */ |
| |
| #if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL) |
| # warning Missing logic |
| #endif |
| |
| #endif |
| return OK; |
| } |
| |
| /**************************************************************************** |
| * Name: up_shutdown |
| * |
| * Description: |
| * Disable the UART. This method is called when the serial port is closed |
| * |
| ****************************************************************************/ |
| |
| static void up_shutdown(struct uart_dev_s *dev) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| |
| /* Disable interrupts */ |
| |
| up_disableuartint(priv, NULL); |
| |
| up_enable_uart(priv, false); |
| } |
| |
| /**************************************************************************** |
| * Name: up_attach |
| * |
| * Description: |
| * Configure the UART to operation in interrupt driven mode. This method is |
| * called when the serial port is opened. Normally, this is just after the |
| * the setup() method is called, however, the serial console may operate in |
| * a non-interrupt driven mode during the boot phase. |
| * |
| * RX and TX interrupts are not enabled by the attach method (unless the |
| * hardware supports multiple levels of interrupt enabling). The RX and TX |
| * interrupts are not enabled until the txint() and rxint() are called. |
| * |
| ****************************************************************************/ |
| |
| static int up_attach(struct uart_dev_s *dev) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| int ret; |
| |
| /* Attach and enable the IRQ */ |
| |
| ret = irq_attach(priv->irq, uart_interrupt, dev); |
| if (ret == OK) |
| { |
| /* Enable the interrupt (RX and TX interrupts are still disabled |
| * in the UART |
| */ |
| |
| up_enable_irq(priv->irq); |
| } |
| |
| return ret; |
| } |
| |
| /**************************************************************************** |
| * Name: up_detach |
| * |
| * Description: |
| * Detach UART interrupts. This method is called when the serial port is |
| * closed normally just before the shutdown method is called. The exception |
| * is the serial console which is never shutdown. |
| * |
| ****************************************************************************/ |
| |
| static void up_detach(struct uart_dev_s *dev) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| |
| /* Disable interrupts */ |
| |
| up_disable_irq(priv->irq); |
| |
| /* Detach from the interrupt */ |
| |
| irq_detach(priv->irq); |
| } |
| |
| /**************************************************************************** |
| * Name: up_interrupt |
| * |
| * Description: |
| * This is the UART interrupt handler. It will be invoked when an |
| * interrupt is received on the 'irq'. It should call uart_xmitchars or |
| * uart_recvchars to perform the appropriate data transfers. The |
| * interrupt handling logic must be able to map the 'arg' to the |
| * appropriate uart_dev_s structure in order to call these functions. |
| * |
| ****************************************************************************/ |
| |
| static int uart_interrupt(int irq, void *context, void *arg) |
| { |
| struct uart_dev_s *dev = (struct uart_dev_s *)arg; |
| struct up_dev_s *priv; |
| uint32_t status; |
| int passes; |
| |
| DEBUGASSERT(dev != NULL && dev->priv != NULL); |
| priv = (struct up_dev_s *)dev->priv; |
| |
| /* Loop until there are no characters to be transferred or, |
| * until we have been looping for a long time. |
| */ |
| |
| for (passes = 0; passes < 256; passes++) |
| { |
| /* Get the current UART status */ |
| |
| status = up_serialin(priv, MPFS_UART_IIR_OFFSET); |
| |
| /* Handle the interrupt by its interrupt ID field */ |
| |
| switch (status & UART_IIR_IID_MASK) |
| { |
| /* Handle incoming, receive bytes (with or without timeout) */ |
| |
| case UART_IIR_IID_RECV: |
| case UART_IIR_IID_TIMEOUT: |
| { |
| uart_recvchars(dev); |
| break; |
| } |
| |
| /* Handle outgoing, transmit bytes */ |
| |
| case UART_IIR_IID_TXEMPTY: |
| { |
| uart_xmitchars(dev); |
| break; |
| } |
| |
| /* Just clear modem status interrupts */ |
| |
| case UART_IIR_IID_MODEM: |
| { |
| /* Read the modem status register (MSR) to clear */ |
| |
| status = up_serialin(priv, MPFS_UART_MSR_OFFSET); |
| _info("MSR: %02" PRIx32 "\n", status); |
| break; |
| } |
| |
| /* Just clear any line status interrupts */ |
| |
| case UART_IIR_IID_LINESTATUS: |
| { |
| /* Read the line status register (LSR) to clear */ |
| |
| status = up_serialin(priv, MPFS_UART_LSR_OFFSET); |
| _info("LSR: %02" PRIx32 "\n", status); |
| break; |
| } |
| |
| /* No further interrupts pending... return now */ |
| |
| case UART_IIR_IID_NONE: |
| { |
| return OK; |
| } |
| |
| /* Otherwise we have received an interrupt |
| * that we cannot handle |
| */ |
| |
| default: |
| { |
| _err("ERROR: Unexpected IIR: %02" PRIx32 "\n", status); |
| break; |
| } |
| } |
| } |
| |
| return OK; |
| } |
| |
| /**************************************************************************** |
| * Name: up_ioctl |
| * |
| * Description: |
| * All ioctl calls will be routed through this method |
| * |
| ****************************************************************************/ |
| |
| static int up_ioctl(struct file *filep, int cmd, unsigned long arg) |
| { |
| #if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) |
| struct inode *inode = filep->f_inode; |
| struct uart_dev_s *dev = inode->i_private; |
| |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| #endif |
| |
| int ret = OK; |
| |
| switch (cmd) |
| { |
| #ifdef CONFIG_SERIAL_TIOCSERGSTRUCT |
| case TIOCSERGSTRUCT: |
| { |
| struct up_dev_s *user = (struct up_dev_s *)arg; |
| if (!user) |
| { |
| ret = -EINVAL; |
| } |
| else |
| { |
| memcpy(user, dev, sizeof(struct up_dev_s)); |
| } |
| } |
| break; |
| #endif |
| |
| #ifdef CONFIG_SERIAL_TERMIOS |
| case TCGETS: |
| { |
| struct termios *termiosp = (struct termios *)arg; |
| |
| if (!termiosp) |
| { |
| ret = -EINVAL; |
| break; |
| } |
| |
| #ifdef CONFIG_SERIAL_OFLOWCONTROL |
| #endif |
| #ifdef CONFIG_SERIAL_IFLOWCONTROL |
| #endif |
| termiosp->c_cflag = |
| ((priv->parity != 0) ? PARENB : 0) | |
| ((priv->parity == 1) ? PARODD : 0) | |
| ((priv->stopbits2) ? CSTOPB : 0) | |
| ((priv->bits == 5) ? CS5 : 0) | |
| ((priv->bits == 6) ? CS6 : 0) | |
| ((priv->bits == 7) ? CS7 : 0) | |
| ((priv->bits == 8) ? CS8 : 0); |
| |
| cfsetispeed(termiosp, priv->baud); |
| } |
| break; |
| |
| case TCSETS: |
| { |
| struct termios *termiosp = (struct termios *)arg; |
| |
| if (!termiosp) |
| { |
| ret = -EINVAL; |
| break; |
| } |
| |
| if (termiosp->c_cflag & PARENB) |
| { |
| priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2; |
| } |
| else |
| { |
| priv->parity = 0; |
| } |
| |
| priv->stopbits2 = (termiosp->c_cflag & CSTOPB) != 0; |
| |
| switch (termiosp->c_cflag & CSIZE) |
| { |
| case CS5: |
| priv->bits = 5; |
| break; |
| |
| case CS6: |
| priv->bits = 6; |
| break; |
| |
| case CS7: |
| priv->bits = 7; |
| break; |
| |
| case CS8: |
| priv->bits = 8; |
| break; |
| |
| default: |
| priv->bits = 0; |
| ret = -EINVAL; |
| break; |
| } |
| |
| if (ret == OK) |
| { |
| /* Note that only cfgetispeed is used because we have knowledge |
| * that only one speed is supported. |
| */ |
| |
| priv->baud = cfgetispeed(termiosp); |
| |
| /* Effect the changes immediately - note that we do not implement |
| * TCSADRAIN / TCSAFLUSH |
| */ |
| |
| up_set_format(dev); |
| } |
| } |
| break; |
| #endif /* CONFIG_SERIAL_TERMIOS */ |
| |
| default: |
| ret = -ENOTTY; |
| break; |
| } |
| |
| return ret; |
| } |
| |
| /**************************************************************************** |
| * Name: up_receive |
| * |
| * Description: |
| * Called (usually) from the interrupt level to receive one |
| * character from the UART. Error bits associated with the |
| * receipt are provided in the return 'status'. |
| * |
| ****************************************************************************/ |
| |
| static int up_receive(struct uart_dev_s *dev, uint32_t *status) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| uint32_t rbr; |
| |
| *status = up_serialin(priv, MPFS_UART_LSR_OFFSET); |
| rbr = up_serialin(priv, MPFS_UART_RBR_OFFSET); |
| return rbr; |
| } |
| |
| /**************************************************************************** |
| * Name: up_rxint |
| * |
| * Description: |
| * Call to enable or disable RX interrupts |
| * |
| ****************************************************************************/ |
| |
| static void up_rxint(struct uart_dev_s *dev, bool enable) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| if (enable) |
| { |
| #ifndef CONFIG_SUPPRESS_SERIAL_INTS |
| priv->ier |= UART_IER_ERBFI; |
| #endif |
| } |
| else |
| { |
| priv->ier &= ~UART_IER_ERBFI; |
| } |
| |
| up_serialout(priv, MPFS_UART_IER_OFFSET, priv->ier); |
| } |
| |
| /**************************************************************************** |
| * Name: up_rxavailable |
| * |
| * Description: |
| * Return true if the receive fifo is not empty |
| * |
| ****************************************************************************/ |
| |
| static bool up_rxavailable(struct uart_dev_s *dev) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| return ((up_serialin(priv, MPFS_UART_LSR_OFFSET) & UART_LSR_DR) != 0); |
| } |
| |
| /**************************************************************************** |
| * Name: up_send |
| * |
| * Description: |
| * This method will send one byte on the UART. |
| * |
| ****************************************************************************/ |
| |
| static void up_send(struct uart_dev_s *dev, int ch) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| |
| #ifdef HAVE_SERIAL_CONSOLE |
| if (dev == &CONSOLE_DEV && !dev->isconsole) |
| { |
| return; |
| } |
| #endif |
| |
| while ((up_serialin(priv, MPFS_UART_LSR_OFFSET) |
| & UART_LSR_THRE) == 0); |
| |
| up_serialout(priv, MPFS_UART_THR_OFFSET, (uint32_t)ch); |
| } |
| |
| /**************************************************************************** |
| * Name: up_txint |
| * |
| * Description: |
| * Call to enable or disable TX interrupts |
| * |
| ****************************************************************************/ |
| |
| static void up_txint(struct uart_dev_s *dev, bool enable) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| irqstate_t flags; |
| |
| flags = enter_critical_section(); |
| if (enable) |
| { |
| #ifndef CONFIG_SUPPRESS_SERIAL_INTS |
| priv->ier |= UART_IER_ETBEI; |
| up_serialout(priv, MPFS_UART_IER_OFFSET, priv->ier); |
| |
| /* Fake a TX interrupt here by just calling uart_xmitchars() with |
| * interrupts disabled (note this may recurse). |
| */ |
| |
| uart_xmitchars(dev); |
| #endif |
| } |
| else |
| { |
| priv->ier &= ~UART_IER_ETBEI; |
| up_serialout(priv, MPFS_UART_IER_OFFSET, priv->ier); |
| } |
| |
| leave_critical_section(flags); |
| } |
| |
| /**************************************************************************** |
| * Name: up_txready |
| * |
| * Description: |
| * Return true if the transmit data register is not full |
| * |
| ****************************************************************************/ |
| |
| static bool up_txready(struct uart_dev_s *dev) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| return ((up_serialin(priv, MPFS_UART_LSR_OFFSET) & UART_LSR_THRE) != 0); |
| } |
| |
| /**************************************************************************** |
| * Name: up_txempty |
| * |
| * Description: |
| * Return true if the transmit data register is empty |
| * |
| ****************************************************************************/ |
| |
| static bool up_txempty(struct uart_dev_s *dev) |
| { |
| struct up_dev_s *priv = (struct up_dev_s *)dev->priv; |
| return ((up_serialin(priv, MPFS_UART_LSR_OFFSET) & UART_LSR_THRE) != 0); |
| } |
| |
| /**************************************************************************** |
| * Public Functions |
| ****************************************************************************/ |
| |
| #ifdef USE_EARLYSERIALINIT |
| |
| /**************************************************************************** |
| * Name: riscv_earlyserialinit |
| * |
| * Description: |
| * Performs the low level UART initialization early in debug so that the |
| * serial console will be available during bootup. This must be called |
| * before riscv_serialinit. NOTE: This function depends on |
| * main clock initialization performed in up_clkinitialize(). |
| * |
| ****************************************************************************/ |
| |
| void riscv_earlyserialinit(void) |
| { |
| /* Disable interrupts from all UARTS. The console is enabled in |
| * mpfs_consoleinit(). |
| */ |
| |
| #ifdef CONFIG_MPFS_UART0 |
| up_disableuartint(g_uart0port.priv, NULL); |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART1 |
| up_disableuartint(g_uart1port.priv, NULL); |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART2 |
| up_disableuartint(g_uart2port.priv, NULL); |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART3 |
| up_disableuartint(g_uart3port.priv, NULL); |
| #endif |
| |
| #ifdef CONFIG_MPFS_UART4 |
| up_disableuartint(g_uart4port.priv, NULL); |
| #endif |
| |
| /* Configuration whichever one is the console */ |
| |
| #ifdef HAVE_SERIAL_CONSOLE |
| CONSOLE_DEV.isconsole = true; |
| up_setup(&CONSOLE_DEV); |
| #endif |
| } |
| #endif |
| |
| /**************************************************************************** |
| * Name: riscv_serialinit |
| * |
| * Description: |
| * Register serial console and serial ports. This assumes |
| * that riscv_earlyserialinit was called previously. |
| * |
| ****************************************************************************/ |
| |
| void riscv_serialinit(void) |
| { |
| /* Register the console */ |
| |
| #ifdef HAVE_SERIAL_CONSOLE |
| uart_register("/dev/console", &CONSOLE_DEV); |
| #endif |
| |
| /* Register all UARTs NOTE: we don't reorganize the numbering */ |
| |
| #ifdef CONFIG_MPFS_UART0 |
| uart_register("/dev/ttyS0", &g_uart0port); |
| #endif |
| #ifdef CONFIG_MPFS_UART1 |
| uart_register("/dev/ttyS1", &g_uart1port); |
| #endif |
| #ifdef CONFIG_MPFS_UART2 |
| uart_register("/dev/ttyS2", &g_uart2port); |
| #endif |
| #ifdef CONFIG_MPFS_UART3 |
| uart_register("/dev/ttyS3", &g_uart3port); |
| #endif |
| #ifdef CONFIG_MPFS_UART4 |
| uart_register("/dev/ttyS4", &g_uart4port); |
| #endif |
| } |
| |
| /**************************************************************************** |
| * Name: up_putc |
| * |
| * Description: |
| * Provide priority, low-level access to support OS debug writes |
| * |
| ****************************************************************************/ |
| |
| int up_putc(int ch) |
| { |
| #ifdef HAVE_SERIAL_CONSOLE |
| struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv; |
| uint32_t ier; |
| |
| if (!CONSOLE_DEV.isconsole) |
| { |
| return ch; |
| } |
| |
| up_disableuartint(priv, &ier); |
| #endif |
| |
| /* Check for LF */ |
| |
| if (ch == '\n') |
| { |
| /* Add CR */ |
| |
| riscv_lowputc('\r'); |
| } |
| |
| riscv_lowputc(ch); |
| #ifdef HAVE_SERIAL_CONSOLE |
| up_restoreuartint(priv, ier); |
| #endif |
| return ch; |
| } |
| |
| /**************************************************************************** |
| * Name: riscv_earlyserialinit, riscv_serialinit, and up_putc |
| * |
| * Description: |
| * stubs that may be needed. These stubs would be used if all UARTs are |
| * disabled. In that case, the logic in common/up_initialize() is not |
| * smart enough to know that there are not UARTs and will still expect |
| * these interfaces to be provided. |
| * |
| ****************************************************************************/ |
| |
| #else /* HAVE_UART_DEVICE */ |
| void riscv_earlyserialinit(void) |
| { |
| } |
| |
| void riscv_serialinit(void) |
| { |
| } |
| |
| int up_putc(int ch) |
| { |
| return ch; |
| } |
| |
| #endif /* HAVE_UART_DEVICE */ |
| #else /* USE_SERIALDRIVER */ |
| |
| /**************************************************************************** |
| * Name: up_putc |
| * |
| * Description: |
| * Provide priority, low-level access to support OS debug writes |
| * |
| ****************************************************************************/ |
| |
| int up_putc(int ch) |
| { |
| #ifdef HAVE_SERIAL_CONSOLE |
| /* Check for LF */ |
| |
| if (ch == '\n') |
| { |
| /* Add CR */ |
| |
| riscv_lowputc('\r'); |
| } |
| |
| riscv_lowputc(ch); |
| #endif |
| return ch; |
| } |
| |
| #endif /* USE_SERIALDRIVER */ |