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   <section id="st-stm32f4">
 <h1>ST STM32F4<a class="headerlink" href="#st-stm32f4" title="Permalink to this heading"></a></h1>
 <section id="supported-mcus">
 <h2>Supported MCUs<a class="headerlink" href="#supported-mcus" title="Permalink to this heading"></a></h2>
 <p>TODO</p>
 </section>
 <section id="peripheral-support">
 <h2>Peripheral Support<a class="headerlink" href="#peripheral-support" title="Permalink to this heading"></a></h2>
 <p>The following list indicates peripherals supported in NuttX:</p>
 <table class="docutils align-default">
 <thead>
 <tr class="row-odd"><th class="head"><p>Peripheral</p></th>
 <th class="head"><p>Support</p></th>
 <th class="head"><p>Notes</p></th>
 </tr>
 </thead>
 <tbody>
 <tr class="row-even"><td><p>FLASH</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>CRC</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>PM</p></td>
 <td><p>?</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>RCC</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>GPIO</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>SYSCFG</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>DMA</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>DMA2D</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>EXTI</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>FMC</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>QUADSPI</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>ADC</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>DAC</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>DCMI</p></td>
 <td><p>No</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>LTDC</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>DSI</p></td>
 <td><p>No</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>RNG</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>CRYP</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>HASH</p></td>
 <td><p>?</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>TIM</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>IWDG</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>WWDG</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>RTC</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>I2C</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>USART</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>SPI</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>I2S</p></td>
 <td><p>?</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>SAI</p></td>
 <td><p>No</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>SDIO</p></td>
 <td><p>?</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>CAN</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>OTG_FS</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-odd"><td><p>OTG_HS</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 <tr class="row-even"><td><p>ETH</p></td>
 <td><p>Yes</p></td>
 <td></td>
 </tr>
 </tbody>
 </table>
 <section id="memory">
 <h3>Memory<a class="headerlink" href="#memory" title="Permalink to this heading"></a></h3>
 <ul class="simple">
 <li><p>CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case)</p></li>
 <li><p>CONFIG_RAM_START - The start address of installed DRAM</p></li>
 <li><p>CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP</p></li>
 <li><p>CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 stack. If defined, this symbol is the size of the interrupt
 stack in bytes.  If not defined, the user task stacks will be
 used during interrupt handling.</p></li>
 </ul>
 </section>
 <section id="clock">
 <h3>Clock<a class="headerlink" href="#clock" title="Permalink to this heading"></a></h3>
 <ul>
 <li><p>CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
 configuration features.:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
 </pre></div>
 </div>
 </li>
 <li><p>CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
 of delay loops</p></li>
 </ul>
 </section>
 <section id="timer">
 <h3>TIMER<a class="headerlink" href="#timer" title="Permalink to this heading"></a></h3>
 <p>Timer devices may be used for different purposes.  One special purpose is
 to generate modulated outputs for such things as motor control.  If CONFIG_STM32_TIMn
 is defined (as above) then the following may also be defined to indicate that
 the timer is intended to be used for pulsed output modulation, ADC conversion,
 or DAC conversion. Note that ADC/DAC require two definition:  Not only do you have
 to assign the timer (n) for used by the ADC or DAC, but then you also have to
 configure which ADC or DAC (m) it is assigned to.</p>
 <ul class="simple">
 <li><p>CONFIG_STM32_TIMn_PWM   Reserve timer n for use by PWM, n=1,..,14</p></li>
 <li><p>CONFIG_STM32_TIMn_ADC   Reserve timer n for use by ADC, n=1,..,14</p></li>
 <li><p>CONFIG_STM32_TIMn_ADCm  Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3</p></li>
 <li><p>CONFIG_STM32_TIMn_DAC   Reserve timer n for use by DAC, n=1,..,14</p></li>
 <li><p>CONFIG_STM32_TIMn_DACm  Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2</p></li>
 </ul>
 <p>For each timer that is enabled for PWM usage, we need the following additional
 configuration settings:</p>
 <ul class="simple">
 <li><p>CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}</p></li>
 </ul>
 <p>NOTE: The STM32 timers are each capable of generating different signals on
 each of the four channels with different duty cycles.  That capability is
 not supported by this driver:  Only one output channel per timer.</p>
 </section>
 <section id="jtag">
 <h3>JTAG<a class="headerlink" href="#jtag" title="Permalink to this heading"></a></h3>
 <ul class="simple">
 <li><p>CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)</p></li>
 <li><p>CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
 but without JNTRST.</p></li>
 <li><p>CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled</p></li>
 </ul>
 </section>
 <section id="usart">
 <h3>USART<a class="headerlink" href="#usart" title="Permalink to this heading"></a></h3>
 <ul class="simple">
 <li><p>CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
 m (m=4,5) for the console and ttys0 (default is the USART1).</p></li>
 <li><p>CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
 This specific the size of the receive buffer</p></li>
 <li><p>CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
 being sent.  This specific the size of the transmit buffer</p></li>
 <li><p>CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART.  Must be</p></li>
 <li><p>CONFIG_U[S]ARTn_BITS - The number of bits.  Must be either 7 or 8.</p></li>
 <li><p>CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity</p></li>
 <li><p>CONFIG_U[S]ARTn_2STOP - Two stop bits</p></li>
 </ul>
 </section>
 <section id="can">
 <h3>CAN<a class="headerlink" href="#can" title="Permalink to this heading"></a></h3>
 <ul class="simple">
 <li><p>CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
 CONFIG_STM32_CAN2 must also be defined)</p></li>
 <li><p>CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID.  Default
 Standard 11-bit IDs.</p></li>
 <li><p>CONFIG_CAN_TXFIFOSIZE - The size of the circular tx buffer
 of CAN messages.
 Default: 8</p></li>
 <li><p>CONFIG_CAN_RXFIFOSIZE - The size of the circular rx buffer
 of CAN messages.
 Default: 8</p></li>
 <li><p>CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
 Default: 4</p></li>
 <li><p>CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
 mode for testing. The STM32 CAN driver does support loopback mode.</p></li>
 <li><p>CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN1
 is defined.</p></li>
 <li><p>CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate.  Required if CONFIG_STM32_CAN2
 is defined.</p></li>
 <li><p>CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
 Default: 6</p></li>
 <li><p>CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
 Default: 7</p></li>
 <li><p>CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
 dump of all CAN registers.</p></li>
 </ul>
 </section>
 <section id="spi">
 <h3>SPI<a class="headerlink" href="#spi" title="Permalink to this heading"></a></h3>
 <ul class="simple">
 <li><p>CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
 support. Non-interrupt-driven, poll-waiting is recommended if the
 interrupt rate would be to high in the interrupt driven case.</p></li>
 <li><p>CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
 Cannot be used with CONFIG_STM32_SPI_INTERRUPT.</p></li>
 </ul>
 </section>
 <section id="sdio">
 <h3>SDIO<a class="headerlink" href="#sdio" title="Permalink to this heading"></a></h3>
 <ul class="simple">
 <li><p>CONFIG_SDIO_DMA - Support DMA data transfers.  Requires CONFIG_STM32_SDIO and CONFIG_STM32_DMA2.</p></li>
 <li><p>CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority.  Default: 128</p></li>
 <li><p>CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default:  Medium</p></li>
 <li><p>CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode.  Default:
 4-bit transfer mode.</p></li>
 </ul>
 </section>
 <section id="usb">
 <h3>USB<a class="headerlink" href="#usb" title="Permalink to this heading"></a></h3>
 <p>STM32 USB OTG FS Host Driver Support</p>
 <p>Pre-requisites:</p>
 <ul class="simple">
 <li><p>CONFIG_USBHOST      - Enable general USB host support</p></li>
 <li><p>CONFIG_STM32_OTGFS  - Enable the STM32 USB OTG FS block</p></li>
 <li><p>CONFIG_STM32_SYSCFG - Needed</p></li>
 <li><p>CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
 Default 128 (512 bytes)</p></li>
 <li><p>CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
 in 32-bit words.  Default 96 (384 bytes)</p></li>
 <li><p>CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
 words.  Default 96 (384 bytes)</p></li>
 <li><p>CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor.  Default: 128</p></li>
 <li><p>CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts.  Why would you ever
 want to do that?</p></li>
 <li><p>CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
 debug.  Depends on CONFIG_DEBUG_FEATURES.</p></li>
 <li><p>CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
 packets. Depends on CONFIG_DEBUG_FEATURES.</p></li>
 </ul>
 </section>
 <section id="ltdc-hardware-acceleration">
 <h3>LTDC hardware acceleration<a class="headerlink" href="#ltdc-hardware-acceleration" title="Permalink to this heading"></a></h3>
 <p>The LTDC driver provides two 2 LTDC overlays and supports the following hardware
 acceleration and features:</p>
 <p>Configured at build time:</p>
 <ul class="simple">
 <li><p>background color</p></li>
 <li><p>default color (outside visible screen)</p></li>
 </ul>
 <p>Configurable by nuttx framebuffer interface:</p>
 <ul class="simple">
 <li><p>cmap support (color table is shared by both LTDC overlays and DMA2D when enabled)</p></li>
 </ul>
 <p>Configurable via the nuttx framebuffer interface (for each layer separately):</p>
 <ul class="simple">
 <li><p>chromakey</p></li>
 <li><p>transparency (const alpha and pixel alpha)</p></li>
 <li><p>blank</p></li>
 <li><p>color (if DMA2D is enabled and cmap is disabled)</p></li>
 <li><p>blit (if DMA2D is enabled)</p></li>
 <li><p>blend (if DMA2D is enabled and cmap is disabled)</p></li>
 </ul>
 <p>LTDC overlays are similar to a non-destructive overlay. Both LTDC overlays will
 be permanently blended in the order (background -&gt; overlay 0 -&gt; overlay 1) and
 converted to a resulting video signal by the LTDC controller. That means each
 operation with a LTDC overlay (Overlay 0 and Overlay 1) via nuttx framebuffer
 interface will be visible immediately.
 Think about continuous blending between both overlays.</p>
 </section>
 <section id="dma2d-hardware-acceleration">
 <h3>DMA2D hardware acceleration<a class="headerlink" href="#dma2d-hardware-acceleration" title="Permalink to this heading"></a></h3>
 <p>The DMA2D driver implements the following hardware acceleration:</p>
 <p>Configurable via the nuttx framebuffer interface:</p>
 <ul class="simple">
 <li><p>cmap support (color table is shared by all DMA2D overlays and LTDC overlays)</p></li>
 </ul>
 <p>Configurable via the nuttx framebuffer interface (for each layer separately):</p>
 <ul class="simple">
 <li><p>color (fill memory region with a specific ARGB8888 color immediately), if
 cmap is disabled</p></li>
 <li><p>blit (copy memory region to another memory region with pixel format
 conversion if necessary)</p></li>
 <li><p>blend (blend two memory regions and copy the result to a third memory region
 with pixel format conversion if necessary), if cmap is disabled</p></li>
 </ul>
 <p>Blit and blend operation using a fixes memory size defined by the background
 layer. DMA2D controller doesn’t support scaling.</p>
 <p>DMA2D overlays are similar to destructive overlays. They are invisible. They can
 be used for image preprocessing. The memory region affected by the operations
 (color, blit, blend) can be addressed by the area control command before. The
 configured overlay transparency of DMA2D overlays will be used for subsequently
 blend operation and is valid for the whole overlay.</p>
 </section>
 </section>
 <section id="fpu">
 <h2>FPU<a class="headerlink" href="#fpu" title="Permalink to this heading"></a></h2>
 <section id="fpu-configuration-options">
 <h3>FPU Configuration Options<a class="headerlink" href="#fpu-configuration-options" title="Permalink to this heading"></a></h3>
 <p>There are two version of the FPU support built into the STM32 port.</p>
 <ol class="arabic">
 <li><p>Non-Lazy Floating Point Register Save</p>
 <p>In this configuration floating point register save and restore is
 implemented on interrupt entry and return, respectively.  In this
 case, you may use floating point operations for interrupt handling
 logic if necessary.  This FPU behavior logic is enabled by default
 with:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>CONFIG_ARCH_FPU=y
 </pre></div>
 </div>
 </li>
 <li><p>Lazy Floating Point Register Save.</p>
 <p>An alternative implementation only saves and restores FPU registers only
 on context switches.  This means: (1) floating point registers are not
 stored on each context switch and, hence, possibly better interrupt
 performance.  But, (2) since floating point registers are not saved,
 you cannot use floating point operations within interrupt handlers.</p>
 <p>This logic can be enabled by simply adding the following to your .config file:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>CONFIG_ARCH_FPU=y
 </pre></div>
 </div>
 </li>
 </ol>
 </section>
 </section>
 <section id="development-environment">
 <h2>Development Environment<a class="headerlink" href="#development-environment" title="Permalink to this heading"></a></h2>
 <p>Either Linux or Cygwin on Windows can be used for the development environment.
 The source has been built only using the GNU toolchain (see below).  Other
 toolchains will likely cause problems.</p>
 </section>
 <section id="gnu-toolchain-options">
 <h2>GNU Toolchain Options<a class="headerlink" href="#gnu-toolchain-options" title="Permalink to this heading"></a></h2>
 <section id="toolchain-configurations">
 <h3>Toolchain Configurations<a class="headerlink" href="#toolchain-configurations" title="Permalink to this heading"></a></h3>
 <p>The NuttX make system has been modified to support the following different
 toolchain options.</p>
 <ol class="arabic simple">
 <li><p>The NuttX buildroot Toolchain (see below), or</p></li>
 <li><p>Any generic arm-none-eabi GNU toolchain.</p></li>
 </ol>
 <p>All testing has been conducted using the NuttX Codesourcery toolchain.  To use
 a different toolchain, you simply need to modify the configuration.  As an
 example:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>CONFIG_ARM_TOOLCHAIN_GNU_EABI : Generic arm-none-eabi toolchain
 </pre></div>
 </div>
 </section>
 </section>
 <section id="ides">
 <h2>IDEs<a class="headerlink" href="#ides" title="Permalink to this heading"></a></h2>
 <p>NuttX is built using command-line make.  It can be used with an IDE, but some
 effort will be required to create the project.</p>
 <section id="makefile-build">
 <h3>Makefile Build<a class="headerlink" href="#makefile-build" title="Permalink to this heading"></a></h3>
 <p>Under Eclipse, it is pretty easy to set up an “empty makefile project” and
 simply use the NuttX makefile to build the system.  That is almost for free
 under Linux.  Under Windows, you will need to set up the “Cygwin GCC” empty
 makefile project in order to work with Windows (Google for “Eclipse Cygwin” -
 there is a lot of help on the internet).</p>
 <p>Using Sourcery CodeBench from <a class="reference external" href="http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview">http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview</a>
 Download and install the latest version (as of this writing it was sourceryg++-2013.05-64-arm-none-eabi)</p>
 <p>Import the  project from git.
 File-&gt;import-&gt;Git-URI, then import a Exiting code as a Makefile progject
 from the working directory the git clone was done to.</p>
 <p>Select the Sourcery CodeBench for ARM EABI. N.B. You must do one command line
 build, before the make will work in CodeBench.</p>
 </section>
 <section id="native-build">
 <h3>Native Build<a class="headerlink" href="#native-build" title="Permalink to this heading"></a></h3>
 <p>Here are a few tips before you start that effort:</p>
 <ol class="arabic simple">
 <li><p>Select the toolchain that you will be using in your .config file</p></li>
 <li><p>Start the NuttX build at least one time from the Cygwin command line
 before trying to create your project.  This is necessary to create
 certain auto-generated files and directories that will be needed.</p></li>
 <li><p>Set up include paths:  You will need include/, arch/arm/src/stm32,
 arch/arm/src/common, arch/arm/src/armv7-m, and sched/.</p></li>
 <li><p>All assembly files need to have the definition option -D __ASSEMBLY__
 on the command line.</p></li>
 </ol>
 <p>Startup files will probably cause you some headaches.  The NuttX startup file
 is arch/arm/src/stm32/stm32_vectors.S.  With RIDE, I have to build NuttX
 one time from the Cygwin command line in order to obtain the pre-built
 startup object needed by RIDE.</p>
 </section>
 </section>
 <section id="nuttx-eabi-buildroot-toolchain">
 <h2>NuttX EABI “buildroot” Toolchain<a class="headerlink" href="#nuttx-eabi-buildroot-toolchain" title="Permalink to this heading"></a></h2>
 <p>A GNU GCC-based toolchain is assumed.  The PATH environment variable should
 be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
 different from the default in your PATH variable).</p>
 <p>If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
 Bitbucket download site (<a class="reference external" href="https://bitbucket.org/nuttx/buildroot/downloads/">https://bitbucket.org/nuttx/buildroot/downloads/</a>).
 This GNU toolchain builds and executes in the Linux or Cygwin environment.</p>
 </section>
 <section id="nxflat-toolchain">
 <h2>NXFLAT Toolchain<a class="headerlink" href="#nxflat-toolchain" title="Permalink to this heading"></a></h2>
 <p>If you are <em>not</em> using the NuttX buildroot toolchain and you want to use
 the NXFLAT tools, then you will still have to build a portion of the buildroot
 tools – just the NXFLAT tools.  The buildroot with the NXFLAT tools can
 be downloaded from the NuttX Bitbucket download site
 (<a class="reference external" href="https://bitbucket.org/nuttx/nuttx/downloads/">https://bitbucket.org/nuttx/nuttx/downloads/</a>).</p>
 <p>This GNU toolchain builds and executes in the Linux or Cygwin environment.</p>
 <ol class="arabic">
 <li><p>You must have already configured NuttX in &lt;some-dir&gt;/nuttx.</p>
 <p>tools/configure.sh lpcxpresso-lpc1768:&lt;sub-dir&gt;</p>
 </li>
 <li><p>Download the latest buildroot package into &lt;some-dir&gt;</p></li>
 <li><p>unpack the buildroot tarball.  The resulting directory may
 have versioning information on it like buildroot-x.y.z.  If so,
 rename &lt;some-dir&gt;/buildroot-x.y.z to &lt;some-dir&gt;/buildroot.</p></li>
 <li><p>cd &lt;some-dir&gt;/buildroot</p></li>
 <li><p>cp boards/cortexm3-defconfig-nxflat .config</p></li>
 <li><p>make oldconfig</p></li>
 <li><p>make</p></li>
 <li><dl class="simple">
 <dt>Make sure that the PATH variable includes the path to the newly built</dt><dd><p>NXFLAT binaries.</p>
 </dd>
 </dl>
 </li>
 </ol>
 </section>
 <section id="protected-mode-build">
 <h2>Protected Mode Build<a class="headerlink" href="#protected-mode-build" title="Permalink to this heading"></a></h2>
 <blockquote>
 <div><p>The “protected” mode build uses the Cormtex-M4 MPU to separate the FLASH and
 SRAM into kernel-mode and user-mode regions.  The kernel mode regions are
 then protected from any errant or mischievous behavior from user-space
 applications.</p>
 <p>Common notes for all protected mode builds follow:</p>
 </div></blockquote>
 <ol class="arabic">
 <li><p>It is recommends to use a special make command; not just ‘make’ but make
 with the following two arguments:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>make pass1 pass2
 </pre></div>
 </div>
 <p>In the normal case (just ‘make’), make will attempt to build both user-
 and kernel-mode blobs more or less interleaved.  That actual works!
 However, for me it is very confusing so I prefer the above make command:
 Make the user-space binaries first (pass1), then make the kernel-space
 binaries (pass2)</p>
 </li>
 <li><p>At the end of the build, there will be several files in the top-level
 NuttX build directory:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>PASS1:
   nuttx_user.elf    - The pass1 user-space ELF file
   nuttx_user.hex    - The pass1 Intel HEX format file (selected in defconfig)
   User.map          - Symbols in the user-space ELF file

 PASS2:
   nuttx             - The pass2 kernel-space ELF file
   nuttx.hex         - The pass2 Intel HEX file (selected in defconfig)
   System.map        - Symbols in the kernel-space ELF file

 The J-Link programmer will accept files in .hex, .mot, .srec, and .bin
 formats.
 </pre></div>
 </div>
 </li>
 <li><p>Combining .hex files.  If you plan to use the .hex files with your
 debugger or FLASH utility, then you may need to combine the two hex
 files into a single .hex file.  Here is how you can do that.</p>
 <ol class="loweralpha">
 <li><p>The ‘tail’ of the nuttx.hex file should look something like this
 (with my comments added):</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>  $ tail nuttx.hex
   # 00, data records
   ...
   :10 9DC0 00 01000000000800006400020100001F0004
   :10 9DD0 00 3B005A0078009700B500D400F300110151
   :08 9DE0 00 30014E016D0100008D
   # 05, Start Linear Address Record
   :04 0000 05 0800 0419 D2
   # 01, End Of File record
   :00 0000 01 FF

 Use an editor such as vi to remove the 05 and 01 records.
 </pre></div>
 </div>
 </li>
 <li><dl>
 <dt>The ‘head’ of the nuttx_user.hex file should look something like</dt><dd><p>this (again with my comments added):</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>$ head nuttx_user.hex
 # 04, Extended Linear Address Record
 :02 0000 04 0801 F1
 # 00, data records
 :10 8000 00 BD89 01084C800108C8110208D01102087E
 :10 8010 00 0010 00201C1000201C1000203C16002026
 :10 8020 00 4D80 01085D80010869800108ED83010829
 ...
 </pre></div>
 </div>
 <p>Nothing needs to be done here.  The nuttx_user.hex file should
 be fine.</p>
 </dd>
 </dl>
 </li>
 <li><p>Combine the edited nuttx.hex and un-edited nuttx_user.hex
 file to produce a single combined hex file:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>$ cat nuttx.hex nuttx_user.hex &gt;combined.hex
 </pre></div>
 </div>
 </li>
 </ol>
 <blockquote>
 <div><p>Then use the combined.hex file with the to write the FLASH image. With
 GDB this would be:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>gdb&gt; mon reset
 gdb&gt; mon halt
 gdb&gt; mon clrbp
 gdb&gt; load combined.hex
 </pre></div>
 </div>
 <p>If you do this a lot, you will probably want to invest a little time
 to develop a tool to automate these steps.</p>
 </div></blockquote>
 </li>
 </ol>
 </section>
 <section id="flashing-and-debugging">
 <h2>Flashing and Debugging<a class="headerlink" href="#flashing-and-debugging" title="Permalink to this heading"></a></h2>
 <p>NuttX firmware Flashing with STLink probe and OpenOCD:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>openocd -f  interface/stlink.cfg -f target/stm32f4x.cfg -c &#39;program nuttx.bin 0x08000000; reset run; exit&#39;
 </pre></div>
 </div>
 <p>Remote target Reset with STLink probe and OpenOCD:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>openocd -f interface/stlink.cfg -f target/stm32f4x.cfg -c &#39;init; reset run; exit&#39;
 </pre></div>
 </div>
 <p>Remote target Debug with STLink probe and OpenOCD:</p>
 <blockquote>
 <div><ol class="arabic">
 <li><p>You need to have NuttX built with debug symbols, see <a class="reference internal" href="../../../quickstart/debugging.html#debugging"><span class="std std-ref">Debugging</span></a>.</p></li>
 <li><p>Launch the OpenOCD GDB server:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>openocd -f interface/stlink.cfg -f target/stm32f4x.cfg -c &#39;init; reset halt&#39;
 </pre></div>
 </div>
 </li>
 <li><p>You can now attach to remote OpenOCD GDB server with your favorite debugger,
 for instance gdb:</p>
 <div class="highlight-none notranslate"><div class="highlight"><pre><span></span>arm-none-eabi-gdb --tui nuttx -ex &#39;target extended-remote localhost:3333&#39;
 (gdb) monitor reset halt
 (gdb) breakpoint nsh_main
 (gdb) continue
 </pre></div>
 </div>
 </li>
 </ol>
 </div></blockquote>
 </section>
 <section id="supported-boards">
 <h2>Supported Boards<a class="headerlink" href="#supported-boards" title="Permalink to this heading"></a></h2>
 <div class="toctree-wrapper compound">
 <ul>
 <li class="toctree-l1"><a class="reference internal" href="boards/axoloti/index.html">Axoloti</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/clicker2-stm32/index.html">Mikroe Clicker2 STM32</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/mikroe-stm32f4/index.html">mikroe-stm32f4</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/nucleo-f401re/index.html">ST Nucleo F401RE</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/nucleo-f410rb/index.html">ST Nucleo F410RB</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/nucleo-f411re/index.html">ST Nucleo F411RE</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/nucleo-f412zg/index.html">ST Nucleo F412ZG</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/nucleo-f429zi/index.html">ST Nucleo F429ZI</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/nucleo-f446re/index.html">ST Nucleo F446RE</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/odrive36/index.html">ODrive V3.6</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/olimex-stm32-e407/index.html">Olimex STM32-E407</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/olimex-stm32-h405/index.html">Olimex STM32-P207</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/olimex-stm32-h407/index.html">Olimex STM32-H407</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/olimex-stm32-p407/index.html">Olimex STM32-P207</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/omnibusf4/index.html">OMNIBUSF4</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/stm3240g-eval/index.html">ST STM3240G-EVAL</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/stm32f401rc-rs485/index.html">stm32f401rc-rs485</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/stm32f411-minimum/index.html">stm32f411-minimum</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/stm32f411e-disco/index.html">ST STM32F411E-Discovery</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/stm32f429i-disco/index.html">ST STM32F429I-DISCO</a></li>
 <li class="toctree-l1"><a class="reference internal" href="boards/stm32f4discovery/index.html">ST STM32F4-Discovery</a></li>
 </ul>
 </div>
 </section>
 </section>


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