| /* |
| * Licensed to the Apache Software Foundation (ASF) under one |
| * or more contributor license agreements. See the NOTICE file |
| * distributed with this work for additional information |
| * regarding copyright ownership. The ASF licenses this file |
| * to you under the Apache License, Version 2.0 (the |
| * "License"); you may not use this file except in compliance |
| * with the License. You may obtain a copy of the License at |
| * |
| * http://www.apache.org/licenses/LICENSE-2.0 |
| * |
| * Unless required by applicable law or agreed to in writing, |
| * software distributed under the License is distributed on an |
| * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY |
| * KIND, either express or implied. See the License for the |
| * specific language governing permissions and limitations |
| * under the License. |
| */ |
| #include <assert.h> |
| |
| #include "os/mynewt.h" |
| |
| #if MYNEWT_VAL(UART_0) |
| #include <uart/uart.h> |
| #include <uart_hal/uart_hal.h> |
| #endif |
| |
| #include <hal/hal_bsp.h> |
| #include <hal/hal_gpio.h> |
| #include <hal/hal_flash_int.h> |
| #include <hal/hal_timer.h> |
| |
| /* |
| * Using SPI2 (spi1 in Mynewt parlance) because some SPI1 (spi0) pins are |
| * connected to the onboard LCD. |
| */ |
| #if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE) |
| #include <hal/hal_spi.h> |
| #endif |
| |
| #include <stm32l152xc.h> |
| #include <stm32l1xx_hal_rcc.h> |
| #include <stm32l1xx_hal_pwr.h> |
| #include <stm32l1xx_hal_flash.h> |
| #include <stm32l1xx_hal_gpio_ex.h> |
| #include <mcu/stm32l1_bsp.h> |
| #include "mcu/stm32l1xx_mynewt_hal.h" |
| #include "mcu/stm32_hal.h" |
| #include "hal/hal_i2c.h" |
| |
| #include "bsp/bsp.h" |
| |
| #if MYNEWT_VAL(UART_0) |
| static struct uart_dev hal_uart0; |
| |
| static const struct stm32_uart_cfg uart_cfg[UART_CNT] = { |
| [0] = { |
| .suc_uart = USART3, |
| .suc_rcc_reg = &RCC->APB1ENR, |
| .suc_rcc_dev = RCC_APB1ENR_USART3EN, |
| .suc_pin_tx = MCU_GPIO_PORTB(10), |
| .suc_pin_rx = MCU_GPIO_PORTB(11), |
| .suc_pin_rts = -1, |
| .suc_pin_cts = -1, |
| .suc_pin_af = GPIO_AF7_USART3, |
| .suc_irqn = USART3_IRQn |
| } |
| }; |
| #endif |
| |
| #if MYNEWT_VAL(I2C_0) |
| static struct stm32_hal_i2c_cfg i2c_cfg0 = { |
| .hic_i2c = I2C1, |
| .hic_rcc_reg = &RCC->APB1ENR, |
| .hic_rcc_dev = RCC_APB1ENR_I2C1EN, |
| .hic_pin_sda = MCU_GPIO_PORTB(9), |
| .hic_pin_scl = MCU_GPIO_PORTB(8), |
| .hic_pin_af = GPIO_AF4_I2C1, |
| .hic_10bit = 0, |
| .hic_speed = 100000 /* 100kHz */ |
| }; |
| #endif |
| |
| #if MYNEWT_VAL(SPI_1_SLAVE) || MYNEWT_VAL(SPI_1_MASTER) |
| struct stm32_hal_spi_cfg spi1_cfg = { |
| .ss_pin = MCU_GPIO_PORTB(12), |
| .sck_pin = MCU_GPIO_PORTB(13), |
| .miso_pin = MCU_GPIO_PORTB(14), |
| .mosi_pin = MCU_GPIO_PORTB(15), |
| .irq_prio = 2, |
| }; |
| #endif |
| |
| static const struct hal_bsp_mem_dump dump_cfg[] = { |
| [0] = { |
| .hbmd_start = &_ram_start, |
| .hbmd_size = RAM_SIZE |
| }, |
| }; |
| |
| const struct hal_flash * |
| hal_bsp_flash_dev(uint8_t id) |
| { |
| /* |
| * Internal flash mapped to id 0. |
| */ |
| if (id != 0) { |
| return NULL; |
| } |
| return &stm32l1_flash_dev; |
| } |
| |
| const struct hal_bsp_mem_dump * |
| hal_bsp_core_dump(int *area_cnt) |
| { |
| *area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]); |
| return dump_cfg; |
| } |
| |
| static void |
| clock_config(void) |
| { |
| RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; |
| RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; |
| |
| /* Enable HSI Oscillator and Activate PLL with HSI as source */ |
| RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; |
| RCC_OscInitStruct.HSIState = RCC_HSI_ON; |
| RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; |
| RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
| RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; |
| RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6; |
| RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3; |
| if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
| assert(0); |
| } |
| |
| /* Set Voltage scale1 as MCU will run at 32MHz */ |
| __HAL_RCC_PWR_CLK_ENABLE(); |
| __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
| |
| /* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */ |
| while (__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) != RESET) ; |
| |
| /* |
| * Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 |
| * clocks dividers |
| */ |
| RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | \ |
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); |
| RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
| RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; |
| RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; |
| RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; |
| if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) { |
| assert(0); |
| } |
| } |
| |
| void |
| hal_bsp_init(void) |
| { |
| int rc; |
| |
| (void)rc; |
| |
| clock_config(); |
| |
| #if MYNEWT_VAL(UART_0) |
| rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0", |
| OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]); |
| assert(rc == 0); |
| #endif |
| |
| #if MYNEWT_VAL(TIMER_0) |
| hal_timer_init(0, TIM9); |
| #endif |
| |
| #if MYNEWT_VAL(TIMER_1) |
| hal_timer_init(1, TIM10); |
| #endif |
| |
| #if MYNEWT_VAL(TIMER_2) |
| hal_timer_init(2, TIM11); |
| #endif |
| |
| #if MYNEWT_VAL(SPI_1_MASTER) |
| rc = hal_spi_init(1, &spi1_cfg, HAL_SPI_TYPE_MASTER); |
| assert(rc == 0); |
| #endif |
| |
| #if MYNEWT_VAL(SPI_1_SLAVE) |
| rc = hal_spi_init(1, &spi1_cfg, HAL_SPI_TYPE_SLAVE); |
| assert(rc == 0); |
| #endif |
| |
| #if MYNEWT_VAL(I2C_0) |
| rc = hal_i2c_init(0, &i2c_cfg0); |
| assert(rc == 0); |
| #endif |
| } |
| |
| /** |
| * Returns the configured priority for the given interrupt. If no priority |
| * configured, return the priority passed in |
| * |
| * @param irq_num |
| * @param pri |
| * |
| * @return uint32_t |
| */ |
| uint32_t |
| hal_bsp_get_nvic_priority(int irq_num, uint32_t pri) |
| { |
| /* Add any interrupt priorities configured by the bsp here */ |
| return pri; |
| } |