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#
# Licensed to the Apache Software Foundation (ASF) under one
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# regarding copyright ownership. The ASF licenses this file
# to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
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# software distributed under the License is distributed on an
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syscfg.defs:
STM32_FLASH_SIZE_KB:
description: 'Total flash size in KB.'
value: 1024
syscfg.vals:
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
NFFS_FLASH_AREA: FLASH_AREA_NFFS
COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1
BOOTUTIL_MAX_IMG_SECTORS: 256
STM32_CLOCK_VOLTAGESCALING_CONFIG: 'PWR_REGULATOR_VOLTAGE_SCALE1'
STM32_CLOCK_LSI: 1
STM32_CLOCK_LSE: 0
STM32_CLOCK_LSE_BYPASS: 0
STM32_CLOCK_MSI: 1
STM32_CLOCK_MSI_CALIBRATION: 'RCC_MSICALIBRATION_DEFAULT'
STM32_CLOCK_MSI_CLOCK_RANGE: 'RCC_MSIRANGE_11' # 48MHz
STM32_CLOCK_HSI: 0
STM32_CLOCK_HSI_CALIBRATION: 'RCC_HSICALIBRATION_DEFAULT'
STM32_CLOCK_HSE: 0
STM32_CLOCK_HSE_BYPASS: 0
STM32_CLOCK_PLL_PLLM: 6 # 48 / 6 = 8MHz
STM32_CLOCK_PLL_PLLN: 40 # 48 / 6 * 24 = 320MHz
STM32_CLOCK_PLL_PLLP: 7 # 320 / 7 = 45.71MHz
STM32_CLOCK_PLL_PLLR: 4 # 320 / 4 = 80MHz
STM32_CLOCK_PLL_PLLQ: 4 # 320 / 4 = 80MHz
STM32_CLOCK_AHB_DIVIDER: 'RCC_SYSCLK_DIV1'
STM32_CLOCK_APB1_DIVIDER: 'RCC_HCLK_DIV1'
STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
STM32_FLASH_LATENCY: 'FLASH_LATENCY_4' # max 80MHz
STM32_FLASH_PREFETCH_ENABLE: 0
STM32_INSTRUCTION_CACHE_ENABLE: 1
STM32_DATA_CACHE_ENABLE: 1
UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'
UART_1_PIN_RX: 'MCU_GPIO_PORTA(10)'
I2C_0_PIN_SCL: 'MCU_GPIO_PORTB(8)'
I2C_0_PIN_SDA: 'MCU_GPIO_PORTB(9)'
I2C_1_PIN_SCL: 'MCU_GPIO_PORTB(10)'
I2C_1_PIN_SDA: 'MCU_GPIO_PORTB(11)'
I2C_2_PIN_SCL: 'MCU_GPIO_PORTC(0)'
I2C_2_PIN_SDA: 'MCU_GPIO_PORTC(1)'
SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'
SPI_0_PIN_SCK: 'MCU_GPIO_PORTA(5)'
SPI_0_PIN_MISO: 'MCU_GPIO_PORTA(6)'
SPI_0_PIN_MOSI: 'MCU_GPIO_PORTA(7)'
TIMER_0_TIM: 'TIM2'
TIMER_1_TIM: 'TIM3'
TIMER_2_TIM: 'TIM4'