| # Licensed to the Apache Software Foundation (ASF) under one |
| # or more contributor license agreements. See the NOTICE file |
| # distributed with this work for additional information |
| # regarding copyright ownership. The ASF licenses this file |
| # to you under the Apache License, Version 2.0 (the |
| # "License"); you may not use this file except in compliance |
| # with the License. You may obtain a copy of the License at |
| # |
| # http://www.apache.org/licenses/LICENSE-2.0 |
| # |
| # Unless required by applicable law or agreed to in writing, |
| # software distributed under the License is distributed on an |
| # "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY |
| # KIND, either express or implied. See the License for the |
| # specific language governing permissions and limitations |
| # under the License. |
| |
| syscfg.defs: |
| TIMER_0: |
| description: 'Timer 0' |
| value: 1 |
| TIMER_0_TIM: |
| description: 'TIMx used by OS TIMER_0' |
| value: '' |
| TIMER_1: |
| description: 'Timer 1' |
| value: 0 |
| TIMER_1_TIM: |
| description: 'TIMx used by OS TIMER_1' |
| value: '' |
| TIMER_2: |
| description: 'Timer 2' |
| value: 0 |
| TIMER_2_TIM: |
| description: 'TIMx used by OS TIMER_2' |
| value: '' |
| TIMER_3: |
| description: 'Timer 3' |
| value: 0 |
| TIMER_3_TIM: |
| description: 'TIMx used by OS TIMER_3' |
| value: |
| TIMER_4: |
| description: 'Timer 4' |
| value: 0 |
| TIMER_4_TIM: |
| description: 'TIMx used by OS TIMER_4' |
| value: |
| TIMER_5: |
| description: 'Timer 5' |
| value: 0 |
| TIMER_5_TIM: |
| description: 'TIMx used by OS TIMER_5' |
| value: |
| |
| UART_0: |
| description: 'UART 0' |
| value: 1 |
| UART_0_PIN_TX: |
| description: 'UART_0 TX pin' |
| value: -1 |
| UART_0_PIN_RX: |
| description: 'UART_0 RX pin' |
| value: -1 |
| UART_0_PIN_RTS: |
| description: 'UART_0 RTS pin' |
| value: -1 |
| UART_0_PIN_CTS: |
| description: 'UART_0 CTS pin' |
| value: -1 |
| |
| UART_1: |
| description: 'UART 1' |
| value: 0 |
| UART_1_PIN_TX: |
| description: 'UART_1 TX pin' |
| value: -1 |
| UART_1_PIN_RX: |
| description: 'UART_1 RX pin' |
| value: -1 |
| UART_1_PIN_RTS: |
| description: 'UART_1 RTS pin' |
| value: -1 |
| UART_1_PIN_CTS: |
| description: 'UART_1 CTS pin' |
| value: -1 |
| |
| UART_2: |
| description: 'UART 2' |
| value: 0 |
| UART_2_PIN_TX: |
| description: 'UART_2 TX pin' |
| value: -1 |
| UART_2_PIN_RX: |
| description: 'UART_2 RX pin' |
| value: -1 |
| UART_2_PIN_RTS: |
| description: 'UART_2 RTS pin' |
| value: -1 |
| UART_2_PIN_CTS: |
| description: 'UART_2 CTS pin' |
| value: -1 |
| |
| UART_3: |
| description: 'UART 3' |
| value: 0 |
| UART_3_PIN_TX: |
| description: 'UART_3 TX pin' |
| value: -1 |
| UART_3_PIN_RX: |
| description: 'UART_3 RX pin' |
| value: -1 |
| UART_3_PIN_RTS: |
| description: 'UART_3 RTS pin' |
| value: -1 |
| UART_3_PIN_CTS: |
| description: 'UART_3 CTS pin' |
| value: -1 |
| |
| UART_4: |
| description: 'UART 4' |
| value: 0 |
| UART_4_PIN_TX: |
| description: 'UART_4 TX pin' |
| value: -1 |
| UART_4_PIN_RX: |
| description: 'UART_4 RX pin' |
| value: -1 |
| UART_4_PIN_RTS: |
| description: 'UART_4 RTS pin' |
| value: -1 |
| UART_4_PIN_CTS: |
| description: 'UART_4 CTS pin' |
| value: -1 |
| |
| UART_5: |
| description: 'UART 5' |
| value: 0 |
| UART_5_PIN_TX: |
| description: 'UART_5 TX pin' |
| value: -1 |
| UART_5_PIN_RX: |
| description: 'UART_5 RX pin' |
| value: -1 |
| UART_5_PIN_RTS: |
| description: 'UART_5 RTS pin' |
| value: -1 |
| UART_5_PIN_CTS: |
| description: 'UART_5 CTS pin' |
| value: -1 |
| |
| UART_6: |
| description: 'UART 6' |
| value: 0 |
| UART_6_PIN_TX: |
| description: 'UART_6 TX pin' |
| value: -1 |
| UART_6_PIN_RX: |
| description: 'UART_6 RX pin' |
| value: -1 |
| UART_6_PIN_RTS: |
| description: 'UART_6 RTS pin' |
| value: -1 |
| UART_6_PIN_CTS: |
| description: 'UART_6 CTS pin' |
| value: -1 |
| |
| UART_7: |
| description: 'UART 7' |
| value: 0 |
| UART_7_PIN_TX: |
| description: 'UART_7 TX pin' |
| value: -1 |
| UART_7_PIN_RX: |
| description: 'UART_7 RX pin' |
| value: -1 |
| UART_7_PIN_RTS: |
| description: 'UART_7 RTS pin' |
| value: -1 |
| UART_7_PIN_CTS: |
| description: 'UART_7 CTS pin' |
| value: -1 |
| |
| UART_8: |
| description: 'UART 8' |
| value: 0 |
| UART_8_PIN_TX: |
| description: 'UART_8 TX pin' |
| value: -1 |
| UART_8_PIN_RX: |
| description: 'UART_8 RX pin' |
| value: -1 |
| UART_8_PIN_RTS: |
| description: 'UART_8 RTS pin' |
| value: -1 |
| UART_8_PIN_CTS: |
| description: 'UART_8 CTS pin' |
| value: -1 |
| |
| UART_9: |
| description: 'UART 9' |
| value: 0 |
| UART_9_PIN_TX: |
| description: 'UART_9 TX pin' |
| value: -1 |
| UART_9_PIN_RX: |
| description: 'UART_9 RX pin' |
| value: -1 |
| UART_9_PIN_RTS: |
| description: 'UART_9 RTS pin' |
| value: -1 |
| UART_9_PIN_CTS: |
| description: 'UART_9 CTS pin' |
| value: -1 |
| |
| SPI_0_MASTER: |
| description: 'SPI 0 master' |
| value: 0 |
| restrictions: |
| - "!SPI_0_SLAVE" |
| SPI_0_SLAVE: |
| description: 'SPI 0 slave' |
| value: 0 |
| restrictions: |
| - "!SPI_0_MASTER" |
| SPI_0: |
| description: 'SPI 0 enabled' |
| value: 'MYNEWT_VAL_SPI_0_MASTER || MYNEWT_VAL_SPI_0_SLAVE' |
| SPI_0_CUSTOM_CFG: |
| description: 'Allow SPI_0 configuration override' |
| value: 0 |
| SPI_0_PIN_SCK: |
| description: 'SCK pin for SPI_0' |
| value: '' |
| SPI_0_PIN_MOSI: |
| description: 'MOSI pin for SPI_0' |
| value: '' |
| SPI_0_PIN_MISO: |
| description: 'MISO pin for SPI_0' |
| value: '' |
| SPI_0_PIN_SS: |
| description: 'SS pin for SPI_0' |
| value: '' |
| |
| SPI_1_MASTER: |
| description: 'SPI 1 master' |
| value: 0 |
| restrictions: |
| - "!SPI_1_SLAVE" |
| SPI_1_SLAVE: |
| description: 'SPI 1 slave' |
| value: 0 |
| restrictions: |
| - "!SPI_1_MASTER" |
| SPI_1: |
| description: 'SPI 1 enabled' |
| value: 'MYNEWT_VAL_SPI_1_MASTER || MYNEWT_VAL_SPI_1_SLAVE' |
| SPI_1_CUSTOM_CFG: |
| description: 'Allow SPI_1 configuration override' |
| value: 0 |
| SPI_1_PIN_SCK: |
| description: 'SCK pin for SPI_1' |
| value: '' |
| SPI_1_PIN_MOSI: |
| description: 'MOSI pin for SPI_1' |
| value: '' |
| SPI_1_PIN_MISO: |
| description: 'MISO pin for SPI_1' |
| value: '' |
| SPI_1_PIN_SS: |
| description: 'SS pin for SPI_1' |
| value: '' |
| |
| SPI_2_MASTER: |
| description: 'SPI 2 master' |
| value: 0 |
| restrictions: |
| - "!SPI_2_SLAVE" |
| SPI_2_SLAVE: |
| description: 'SPI 2 slave' |
| value: 0 |
| restrictions: |
| - "!SPI_2_MASTER" |
| SPI_2: |
| description: 'SPI 2 enabled' |
| value: 'MYNEWT_VAL_SPI_2_MASTER || MYNEWT_VAL_SPI_2_SLAVE' |
| SPI_2_CUSTOM_CFG: |
| description: 'Allow SPI_2 configuration override' |
| value: 0 |
| SPI_2_PIN_SCK: |
| description: 'SCK pin for SPI_2' |
| value: '' |
| SPI_2_PIN_MOSI: |
| description: 'MOSI pin for SPI_2' |
| value: '' |
| SPI_2_PIN_MISO: |
| description: 'MISO pin for SPI_2' |
| value: '' |
| SPI_2_PIN_SS: |
| description: 'SS pin for SPI_2' |
| value: '' |
| |
| SPI_3_MASTER: |
| description: 'SPI 3 master' |
| value: 0 |
| restrictions: |
| - "!SPI_3_SLAVE" |
| SPI_3_SLAVE: |
| description: 'SPI 3 slave' |
| value: 0 |
| restrictions: |
| - "!SPI_3_MASTER" |
| SPI_3: |
| description: 'SPI 3 enabled' |
| value: 'MYNEWT_VAL_SPI_3_MASTER || MYNEWT_VAL_SPI_3_SLAVE' |
| SPI_3_CUSTOM_CFG: |
| description: 'Allow SPI_3 configuration override' |
| value: 0 |
| SPI_3_PIN_SCK: |
| description: 'SCK pin for SPI_3' |
| value: '' |
| SPI_3_PIN_MOSI: |
| description: 'MOSI pin for SPI_3' |
| value: '' |
| SPI_3_PIN_MISO: |
| description: 'MISO pin for SPI_3' |
| value: '' |
| SPI_3_PIN_SS: |
| description: 'SS pin for SPI_3' |
| value: '' |
| |
| SPI_4_MASTER: |
| description: 'SPI 4 master' |
| value: 0 |
| restrictions: |
| - "!SPI_4_SLAVE" |
| SPI_4_SLAVE: |
| description: 'SPI 4 slave' |
| value: 0 |
| restrictions: |
| - "!SPI_4_MASTER" |
| SPI_4: |
| description: 'SPI 4 enabled' |
| value: 'MYNEWT_VAL_SPI_4_MASTER || MYNEWT_VAL_SPI_4_SLAVE' |
| SPI_4_CUSTOM_CFG: |
| description: 'Allow SPI_4 configuration override' |
| value: 0 |
| SPI_4_PIN_SCK: |
| description: 'SCK pin for SPI_4' |
| value: '' |
| SPI_4_PIN_MOSI: |
| description: 'MOSI pin for SPI_4' |
| value: '' |
| SPI_4_PIN_MISO: |
| description: 'MISO pin for SPI_4' |
| value: '' |
| SPI_4_PIN_SS: |
| description: 'SS pin for SPI_4' |
| value: '' |
| |
| SPI_5_MASTER: |
| description: 'SPI 5 master' |
| value: 0 |
| restrictions: |
| - "!SPI_5_SLAVE" |
| SPI_5_SLAVE: |
| description: 'SPI 5 slave' |
| value: 0 |
| restrictions: |
| - "!SPI_5_MASTER" |
| SPI_5: |
| description: 'SPI 5 enabled' |
| value: 'MYNEWT_VAL_SPI_5_MASTER || MYNEWT_VAL_SPI_5_SLAVE' |
| SPI_5_CUSTOM_CFG: |
| description: 'Allow SPI_5 configuration override' |
| value: 0 |
| SPI_5_PIN_SCK: |
| description: 'SCK pin for SPI_5' |
| value: '' |
| SPI_5_PIN_MOSI: |
| description: 'MOSI pin for SPI_5' |
| value: '' |
| SPI_5_PIN_MISO: |
| description: 'MISO pin for SPI_5' |
| value: '' |
| SPI_5_PIN_SS: |
| description: 'SS pin for SPI_5' |
| value: '' |
| |
| I2C_0: |
| description: 'I2C (TWI) interface 0' |
| value: 0 |
| I2C_0_PIN_SCL: |
| description: 'SCL pin for I2C_0' |
| value: -1 |
| I2C_0_PIN_SDA: |
| description: 'SDA pin for I2C_0' |
| value: -1 |
| I2C_1: |
| description: 'I2C (TWI) interface 1' |
| value: 0 |
| I2C_1_PIN_SCL: |
| description: 'SCL pin for I2C_1' |
| value: -1 |
| I2C_1_PIN_SDA: |
| description: 'SDA pin for I2C_1' |
| value: -1 |
| I2C_2: |
| description: 'I2C (TWI) interface 2' |
| value: 0 |
| I2C_2_PIN_SCL: |
| description: 'SCL pin for I2C_2' |
| value: -1 |
| I2C_2_PIN_SDA: |
| description: 'SDA pin for I2C_2' |
| value: -1 |
| I2C_3: |
| description: 'I2C (TWI) interface 3' |
| value: 0 |
| I2C_3_PIN_SCL: |
| description: 'SCL pin for I2C_3' |
| value: -1 |
| I2C_3_PIN_SDA: |
| description: 'SDA pin for I2C_3' |
| value: -1 |
| |
| TRNG: |
| description: 'True Random Number Generator (RNG)' |
| value: 0 |
| |
| CRYPTO: |
| description: 'Enable HW Cryptography module (CRYP)' |
| value: 0 |
| |
| HASH: |
| description: 'Enable HW hash module (HASH)' |
| value: 0 |
| |
| PWM_0: |
| description: 'Support for PWM 0' |
| value: 0 |
| PWM_1: |
| description: 'Support for PWM 1' |
| value: 0 |
| PWM_2: |
| description: 'Support for PWM 2' |
| value: 0 |
| |
| ETH_0: |
| description: 'Ethernet driver for LwIP' |
| value: 0 |
| |
| ADC_0: |
| description: "ADC_0" |
| value: 0 |
| ADC_1: |
| description: "ADC_1" |
| value: 0 |
| ADC_2: |
| description: "ADC_2" |
| value: 0 |
| |
| BSP_FLASH_SPI_BUS: |
| description: 'bus name SPIFLASH is connected to' |
| value: '"spi0"' |
| |
| BSP_FLASH_SPI_NAME: |
| description: 'SPIFLASH device name' |
| value: '"spiflash0"' |
| |
| OS_TICKS_USE_RTC: |
| description: > |
| Use RTC as source of system ticks. |
| When enabled, OS_TICKS_PER_SEC should be one of 128, 256, 512, 1024. |
| value: 0 |
| |
| STM32_WFI_FROM_RAM: |
| description: > |
| Place WFI instruction in RAM instead of flash. |
| This may be needed for several MCU's including STM32F40x. |
| value: |
| |
| STM32_TIMER_AUTO_OFF_COUNT: |
| description: > |
| Turn off hal timer if it is not used for a specific number of overflows. |
| HAL timers are used for high frequency time measurement or delays. |
| Due to high frequency nature of the timer, counter overflows interrupts |
| would interrupt sleep event if timer is not in use. |
| This value when set to value graters then 0 will all to turn off timer |
| after number of overflow events without user code asking for timer value |
| or scheduling event. |
| range: 0..255 |
| value: 0 |
| |
| STM32_FLASH_SIZE_KB: |
| description: 'Total flash size in KB. Defined in BSP' |
| value: |
| STM32_FLASH_NUM_AREAS: |
| description: 'Number of flash sectors for a non-linear STM32 MCU.' |
| value: |
| |
| syscfg.vals: |
| OS_TICKS_PER_SEC: 1000 |
