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/*
* Licensed to the Apache Software Foundation (ASF) under one
* or more contributor license agreements. See the NOTICE file
* distributed with this work for additional information
* regarding copyright ownership. The ASF licenses this file
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
* software distributed under the License is distributed on an
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
* KIND, either express or implied. See the License for the
* specific language governing permissions and limitations
* under the License.
*/
#include <assert.h>
#include "bsp/bsp.h"
#include "os/mynewt.h"
#include "mynewt_cm.h"
#include <hal/hal_bsp.h>
#include <hal/hal_flash_int.h>
#include <hal/hal_system.h>
#include <stm32f103xb.h>
#include <stm32_common/stm32_hal.h>
#if MYNEWT_VAL(PWM_0) || MYNEWT_VAL(PWM_1) || MYNEWT_VAL(PWM_2)
#include <pwm_stm32/pwm_stm32.h>
#endif
#if MYNEWT_VAL(UART_0)
const struct stm32_uart_cfg os_bsp_uart0_cfg = {
.suc_uart = USART2,
.suc_rcc_reg = &RCC->APB1ENR,
.suc_rcc_dev = RCC_APB1ENR_USART2EN,
.suc_pin_tx = MYNEWT_VAL(UART_0_PIN_TX),
.suc_pin_rx = MYNEWT_VAL(UART_0_PIN_RX),
.suc_pin_rts = MYNEWT_VAL(UART_0_PIN_RTS),
.suc_pin_cts = MYNEWT_VAL(UART_0_PIN_CTS),
.suc_pin_remap_fn = LL_GPIO_AF_DisableRemap_USART2,
.suc_irqn = USART2_IRQn,
};
#endif
#if MYNEWT_VAL(I2C_0)
const struct stm32_hal_i2c_cfg os_bsp_i2c0_cfg = {
.hic_i2c = I2C1,
.hic_rcc_reg = &RCC->APB1ENR,
.hic_rcc_dev = RCC_APB1ENR_I2C1EN,
.hic_pin_sda = MYNEWT_VAL(I2C_0_PIN_SDA),
.hic_pin_scl = MYNEWT_VAL(I2C_0_PIN_SCL),
.hic_pin_remap_fn = LL_GPIO_AF_DisableRemap_I2C1,
.hic_10bit = 0,
.hic_speed = 100000,
};
#endif
static const struct hal_bsp_mem_dump dump_cfg[] = {
[0] = {
.hbmd_start = &_ram_start,
.hbmd_size = RAM_SIZE
},
};
extern const struct hal_flash stm32_flash_dev;
const struct hal_flash *
hal_bsp_flash_dev(uint8_t id)
{
/*
* Internal flash mapped to id 0.
*/
if (id != 0) {
return NULL;
}
return &stm32_flash_dev;
}
const struct hal_bsp_mem_dump *
hal_bsp_core_dump(int *area_cnt)
{
*area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]);
return dump_cfg;
}
void
hal_bsp_init(void)
{
stm32_periph_create();
}
void
hal_bsp_deinit(void)
{
Cortex_DisableAll();
RCC->AHBENR = RCC_AHBENR_FLITFEN | RCC_AHBENR_SRAMEN;
RCC->APB1ENR = 0;
RCC->APB2ENR = 0;
RCC->APB1RSTR = 0xFFFFFFFF;
RCC->APB2RSTR = 0x0038FFFD;
RCC->APB1RSTR = 0x0;
RCC->APB2RSTR = 0x0;
}
/**
* Returns the configured priority for the given interrupt. If no priority
* configured, return the priority passed in
*
* @param irq_num
* @param pri
*
* @return uint32_t
*/
uint32_t
hal_bsp_get_nvic_priority(int irq_num, uint32_t pri)
{
/* Add any interrupt priorities configured by the bsp here */
return pri;
}