blob: 951e23d27d2591f899927d15217067d408a2ffdc [file] [log] [blame]
#
# Licensed to the Apache Software Foundation (ASF) under one
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# regarding copyright ownership. The ASF licenses this file
# to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance
# with the License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
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# software distributed under the License is distributed on an
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syscfg.defs:
STM32_FLASH_SIZE_KB:
description: 'Total flash size in KB.'
value: 256
syscfg.vals:
REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
NFFS_FLASH_AREA: FLASH_AREA_NFFS
COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1
STM32_CLOCK_VOLTAGESCALING_CONFIG: 'PWR_REGULATOR_VOLTAGE_SCALE1'
STM32_CLOCK_LSI: 1
STM32_CLOCK_LSE: 0
STM32_CLOCK_LSE_BYPASS: 0
STM32_CLOCK_MSI: 0
STM32_CLOCK_MSI_CALIBRATION: 0
STM32_CLOCK_MSI_CLOCK_RANGE: 'RCC_MSIRANGE_5' # 2.097MHz
STM32_CLOCK_HSI: 1
STM32_CLOCK_HSI_CALIBRATION: 16
STM32_CLOCK_HSE: 0
STM32_CLOCK_HSE_BYPASS: 0
STM32_CLOCK_PLL_MUL: 'RCC_PLL_MUL4' # 16 * 4 = 64MHz
STM32_CLOCK_PLL_DIV: 'RCC_PLL_DIV2' # 64 / 2 = 32MHz
STM32_CLOCK_AHB_DIVIDER: 'RCC_SYSCLK_DIV1'
STM32_CLOCK_APB1_DIVIDER: 'RCC_HCLK_DIV1'
STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
STM32_FLASH_LATENCY: 1 # max 32MHz
STM32_FLASH_PREFETCH_ENABLE: 0
UART_0_PIN_TX: 'MCU_GPIO_PORTB(10)'
UART_0_PIN_RX: 'MCU_GPIO_PORTB(11)'
SPI_1_PIN_SS: 'MCU_GPIO_PORTB(12)'
SPI_1_PIN_SCK: 'MCU_GPIO_PORTB(13)'
SPI_1_PIN_MISO: 'MCU_GPIO_PORTB(14)'
SPI_1_PIN_MOSI: 'MCU_GPIO_PORTB(15)'
I2C_0_PIN_SCL: 'MCU_GPIO_PORTB(8)'
I2C_0_PIN_SDA: 'MCU_GPIO_PORTB(9)'
TIMER_0_TIM: 'TIM9'
TIMER_1_TIM: 'TIM10'
TIMER_2_TIM: 'TIM11'