hw/bsp: Add olimex-pic32-emz64
Add BSP to PIC32MZ2048EFH064 based board from Olimex
diff --git a/hw/bsp/olimex-pic32-emz64/bsp.yml b/hw/bsp/olimex-pic32-emz64/bsp.yml
new file mode 100644
index 0000000..cd9a3d9
--- /dev/null
+++ b/hw/bsp/olimex-pic32-emz64/bsp.yml
@@ -0,0 +1,64 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+bsp.name: "PIC32-EMZ64"
+bsp.url: https://www.olimex.com/Products/PIC/Development/PIC32-EMZ64/open-source-hardware
+bsp.maker: "Olimex"
+
+bsp.arch: pic32
+bsp.compiler: "@apache-mynewt-core/compiler/xc32"
+bsp.downloadscript: "hw/bsp/olimex-pic32-emz64/download.sh"
+bsp.debugscript: "hw/bsp/olimex-pic32-emz64/debug.sh"
+bsp.linkerscript:
+ - "@apache-mynewt-core/hw/mcu/microchip/pic32mz/p32mz_app.ld"
+
+bsp.linkerscript.BOOT_LOADER.OVERWRITE:
+ - "@apache-mynewt-core/hw/mcu/microchip/pic32mz/p32mz_boot.ld"
+
+bsp.flash_map:
+ areas:
+ # System areas.
+ FLASH_AREA_BOOTLOADER:
+ device: 0
+ offset: 0x1FC00000
+ size: 64kB
+ FLASH_AREA_IMAGE_0:
+ device: 0
+ offset: 0x1D000000
+ size: 192kB
+ FLASH_AREA_IMAGE_1:
+ device: 0
+ offset: 0x1D030000
+ size: 192kB
+ FLASH_AREA_IMAGE_SCRATCH:
+ device: 0
+ offset: 0x1D060000
+ size: 16kB
+
+ # User areas.
+ FLASH_AREA_REBOOT_LOG:
+ user_id: 0
+ device: 1
+ offset: 0x00000000
+ size: 64kB
+ FLASH_AREA_NFFS:
+ user_id: 1
+ device: 1
+ offset: 0x00010000
+ size: 32kB
diff --git a/hw/bsp/olimex-pic32-emz64/download.sh b/hw/bsp/olimex-pic32-emz64/download.sh
new file mode 100644
index 0000000..358f287
--- /dev/null
+++ b/hw/bsp/olimex-pic32-emz64/download.sh
@@ -0,0 +1,54 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+
+# Called with following variables set:
+# - CORE_PATH is absolute path to @apache-mynewt-core
+# - BSP_PATH is absolute path to hw/bsp/bsp_name
+# - BIN_BASENAME is the path to prefix to target binary,
+# .elf appended to name is the ELF file
+# - IMAGE_SLOT is the image slot to download to (for non-mfg-image, non-boot)
+# - FEATURES holds the target features string
+# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
+# - MFG_IMAGE is "1" if this is a manufacturing image
+# - FLASH_OFFSET contains the flash offset to download to
+# - BOOT_LOADER is set if downloading a bootloader
+
+if [ "${HWTOOL}" = "pickit3" ]; then
+ . $CORE_PATH/hw/scripts/mplab_mdb.sh
+
+ export DEVICE=PIC32MZ2048EFH064
+
+ mdb_load
+
+else
+
+ echo "r" > script
+ echo "h" >> script
+ if [ "$BOOT_LOADER" -o "$MYNEWT_VAL_MCU_NO_BOOTLOADER_BUILD" == "1" ]; then
+ xc32-objcopy -O ihex ${BIN_BASENAME}.elf ${BIN_BASENAME}.hex
+ echo "loadfile ${BIN_BASENAME}.hex" >> script
+ else
+ cp ${BIN_BASENAME}.img ${BIN_BASENAME}.bin
+ echo "loadfile ${BIN_BASENAME}.bin 0x1d000000" >> script
+ fi
+ echo "r" >> script
+ echo "g" >> script
+ echo "q" >> script
+
+ JLink${COMSPEC:+.}Exe -AutoConnect 1 -Device PIC32MZ2048EFH064 -If ICSP -speed 12000 -CommandFile script
+fi
diff --git a/hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h b/hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h
new file mode 100644
index 0000000..8f22cd3
--- /dev/null
+++ b/hw/bsp/olimex-pic32-emz64/include/bsp/bsp.h
@@ -0,0 +1,67 @@
+/**
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+#ifndef H_BSP_H
+#define H_BSP_H
+
+#include <inttypes.h>
+#include <xc.h>
+#include <mcu/mcu.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/* Define special stackos sections */
+#define sec_data_core __attribute__((section(".data.core")))
+#define sec_bss_core __attribute__((section(".bss.core")))
+#define sec_bss_nz_core __attribute__((section(".bss.core.nz")))
+
+/* More convenient section placement macros. */
+#define bssnz_t sec_bss_nz_core
+
+extern uint8_t _ram_start;
+
+#define RAM_SIZE (512 * 1024)
+
+/* LED pins */
+#define LED_1 MCU_GPIO_PORTB(8)
+#define LED_2 MCU_GPIO_PORTB(9)
+#define LED_3 MCU_GPIO_PORTB(10)
+#define LED_BLINK_PIN LED_2
+
+/* Buttons */
+#define BUTTON_1 MCU_GPIO_PORTB(12)
+#define BUTTON_2 MCU_GPIO_PORTB(13)
+#define BUTTON_3 MCU_GPIO_PORTB(14)
+
+/* UART */
+#define UART_CNT (6)
+
+/* SPI */
+#define SPI_CNT (6)
+
+/* I2C */
+#define I2C_CNT (5)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* H_BSP_H */
diff --git a/hw/bsp/olimex-pic32-emz64/p32mz_app_mem.ld b/hw/bsp/olimex-pic32-emz64/p32mz_app_mem.ld
new file mode 100644
index 0000000..5a21eb6
--- /dev/null
+++ b/hw/bsp/olimex-pic32-emz64/p32mz_app_mem.ld
@@ -0,0 +1,13 @@
+
+/*
+ * Part of the MEMORY section that defines application memory size.
+ * This file is included by MCU linker script.
+ * this file does not have whole MEMORY section to make it clear
+ * what are differences between MCUs (Flash size and RAM), config
+ * sections are same.
+ */
+
+ /* Program leave space for image header ~192KB */
+ kseg0_program_mem (rx) : ORIGIN = 0x9D000020, LENGTH = 0x2FFE0
+ /* Cachable RAM 512KB */
+ kseg0_data_mem (w!x) : ORIGIN = 0x80000000, LENGTH = 0x80000
diff --git a/hw/bsp/olimex-pic32-emz64/pkg.yml b/hw/bsp/olimex-pic32-emz64/pkg.yml
new file mode 100644
index 0000000..8d17af1
--- /dev/null
+++ b/hw/bsp/olimex-pic32-emz64/pkg.yml
@@ -0,0 +1,38 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+pkg.name: hw/bsp/olimex-pic32-emz64
+pkg.type: bsp
+pkg.description: BSP definition for the Olimex PIC32-EMZ64 board.
+pkg.author: "Apache Mynewt <dev@mynewt.apache.org>"
+pkg.homepage: "http://mynewt.apache.org/"
+pkg.keywords:
+ - pic32
+ - microchip
+
+pkg.cflags:
+ - -mprocessor=32MZ2048EFH064
+ - -G6
+pkg.lflags:
+ - "-L@apache-mynewt-core/hw/bsp/olimex-pic32-emz64"
+
+pkg.deps:
+ - "@apache-mynewt-core/hw/mcu/microchip/pic32mz"
+ - "@apache-mynewt-core/libc/baselibc"
+ - "@apache-mynewt-core/hw/drivers/flash/spiflash"
diff --git a/hw/bsp/olimex-pic32-emz64/src/hal_bsp.c b/hw/bsp/olimex-pic32-emz64/src/hal_bsp.c
new file mode 100644
index 0000000..414ab31
--- /dev/null
+++ b/hw/bsp/olimex-pic32-emz64/src/hal_bsp.c
@@ -0,0 +1,154 @@
+/**
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements. See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership. The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied. See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+#include <assert.h>
+
+#include "os/mynewt.h"
+
+#include <bsp/bsp.h>
+#include <hal/hal_bsp.h>
+#include <mcu/mips_bsp.h>
+#include <mcu/mips_hal.h>
+#include <mcu/pic32mz_periph.h>
+#include <string.h>
+#include <xc.h>
+
+#if MYNEWT_VAL(SPIFLASH)
+#include <spiflash/spiflash.h>
+#endif
+
+#if MYNEWT_VAL(BOOT_LOADER) || MYNEWT_VAL(MCU_NO_BOOTLOADER_BUILD)
+/* JTAG on, WDT off */
+#pragma config FDMTEN=0, FSOSCEN=0, DMTCNT=1
+#pragma config DEBUG=ON
+#pragma config JTAGEN=OFF
+#pragma config FSLEEP=OFF
+#pragma config TRCEN=OFF
+#pragma config ICESEL=ICS_PGx2
+
+#if MYNEWT_VAL(CLOCK_FREQ) == 8000000
+#pragma config POSCMOD = OFF
+#pragma config FNOSC = FRCDIV
+#pragma config FPLLICLK=0
+#else
+#pragma config POSCMOD = EC
+#if MYNEWT_VAL(CLOCK_FREQ) == 24000000
+#pragma config FNOSC = POSC
+/* 24MHz posc input -> 50mhz*/
+#pragma config FPLLICLK=0
+#elif MYNEWT_VAL(CLOCK_FREQ) == 50000000
+#pragma config FNOSC = SPLL
+/* 24MHz posc input to pll, div by 3 -> 8, multiply by 50 -> 400, div by 8 -> 50mhz*/
+#pragma config FPLLICLK=0, FPLLIDIV=DIV_3, FPLLRNG=RANGE_5_10_MHZ, FPLLMULT=MUL_50, FPLLODIV=DIV_8
+#elif MYNEWT_VAL(CLOCK_FREQ) == 100000000
+#pragma config FNOSC = SPLL
+/* 24MHz posc input to pll, div by 3, multiply by 50, div by 4 -> 100mhz*/
+#pragma config FPLLICLK=0, FPLLIDIV=DIV_3, FPLLRNG=RANGE_5_10_MHZ, FPLLMULT=MUL_50, FPLLODIV=DIV_4
+#elif MYNEWT_VAL(CLOCK_FREQ) == 200000000
+#pragma config FNOSC = SPLL
+/* 24MHz posc input to pll, div by 3, multiply by 50, div by 2 -> 200mhz*/
+#pragma config FPLLICLK=0, FPLLIDIV=DIV_3, FPLLRNG=RANGE_5_10_MHZ, FPLLMULT=MUL_50, FPLLODIV=DIV_2
+#else
+#error Clock requency not supported
+#endif
+#endif
+/* USB off */
+#pragma config FUSBIDIO=0
+/*
+ * Watchdog in non-window mode, watchdog disabled during flash programming,
+ * period: 32s
+ */
+#pragma config WINDIS=1, WDTSPGM=1, WDTPS=15
+
+#endif
+
+#if MYNEWT_VAL(SPIFLASH)
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+struct bus_spi_node_cfg flash_spi_cfg = {
+ .node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
+ .pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
+ .mode = BUS_SPI_MODE_3,
+ .data_order = HAL_SPI_MSB_FIRST,
+ .freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
+};
+#endif
+#endif
+
+static const struct hal_flash *flash_devs[] = {
+ [0] = &pic32mz_flash_dev,
+#if MYNEWT_VAL(SPIFLASH)
+ [1] = &spiflash_dev.hal,
+#endif
+};
+
+const struct hal_flash *
+hal_bsp_flash_dev(uint8_t id)
+{
+ if (id >= ARRAY_SIZE(flash_devs)) {
+ return NULL;
+ }
+
+ return flash_devs[id];
+}
+
+void
+hal_bsp_init(void)
+{
+ pic32mz_periph_create();
+#if MYNEWT_VAL(SPIFLASH) && MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ rc = spiflash_create_spi_dev(&spiflash_dev.dev,
+ MYNEWT_VAL(BSP_FLASH_SPI_NAME), &flash_spi_cfg);
+ assert(rc == 0);
+#endif
+}
+
+void
+hal_bsp_deinit(void)
+{
+ IEC0 = 0;
+ IEC1 = 0;
+ IEC2 = 0;
+ IEC3 = 0;
+ IEC4 = 0;
+ IEC5 = 0;
+ IEC6 = 0;
+ IFS0 = 0;
+ IFS1 = 0;
+ IFS2 = 0;
+ IFS3 = 0;
+ IFS4 = 0;
+ IFS5 = 0;
+ IFS6 = 0;
+}
+
+int
+hal_bsp_hw_id_len(void)
+{
+ return sizeof(DEVID);
+}
+
+int
+hal_bsp_hw_id(uint8_t *id, int max_len)
+{
+ if (max_len > sizeof(DEVID)) {
+ max_len = sizeof(DEVID);
+ }
+
+ memcpy(id, (const void *)&DEVID, max_len);
+ return max_len;
+}
diff --git a/hw/bsp/olimex-pic32-emz64/syscfg.yml b/hw/bsp/olimex-pic32-emz64/syscfg.yml
new file mode 100644
index 0000000..eafd62c
--- /dev/null
+++ b/hw/bsp/olimex-pic32-emz64/syscfg.yml
@@ -0,0 +1,49 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+syscfg.defs:
+ HARDFLOAT:
+ description: 'Whether to enable UART0 FPU context switch'
+ value: 1
+
+ CLOCK_FREQ:
+ description: 'System clock frequency, defined in hal_bsp.c'
+ value: 200000000
+ range: 8000000, 24000000, 50000000, 100000000, 200000000
+
+syscfg.vals:
+ TIMER_0: 1
+ I2C_3: 1
+ I2C_3_FREQ_KHZ: 400
+ I2C_4: 1
+ I2C_4_FREQ_KHZ: 400
+ UART_3: 1
+ UART_3_PIN_TX: MCU_GPIO_PORTD(4)
+ UART_3_PIN_RX: MCU_GPIO_PORTD(0)
+ SPI_3_MASTER: 1
+ SPI_3_MASTER_PIN_MOSI: MCU_GPIO_PORTD(5)
+ SPI_3_MASTER_PIN_MISO: MCU_GPIO_PORTD(11)
+ CONSOLE_UART_DEV: '"uart3"'
+
+ SYSTEM_CLOCK_SRC: POSC_PLL
+ SYSTEM_CLOCK_OSC_FREQ: 24000000
+ SYSTEM_CLOCK_PLLIDIV: 3
+ SYSTEM_CLOCK_PLLRANGE: 1
+ SYSTEM_CLOCK_PLLMULT: 50
+ SYSTEM_CLOCK_PLLODIV: 2
