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<!DOCTYPE html><html lang="en"><head><meta charset="utf-8"><meta name="viewport" content="width=device-width, initial-scale=1.0"><meta name="generator" content="rustdoc"><meta name="description" content="A library to parse the x86 CPUID instruction, written in rust with no external dependencies. The implementation closely resembles the Intel CPUID manual description. The library works with no_std."><meta name="keywords" content="rust, rustlang, rust-lang, raw_cpuid"><title>raw_cpuid - Rust</title><link rel="preload" as="font" type="font/woff2" crossorigin href="../SourceSerif4-Regular.ttf.woff2"><link rel="preload" as="font" type="font/woff2" crossorigin href="../FiraSans-Regular.woff2"><link rel="preload" as="font" type="font/woff2" crossorigin href="../FiraSans-Medium.woff2"><link rel="preload" as="font" type="font/woff2" crossorigin href="../SourceCodePro-Regular.ttf.woff2"><link rel="preload" as="font" type="font/woff2" crossorigin href="../SourceSerif4-Bold.ttf.woff2"><link rel="preload" as="font" type="font/woff2" crossorigin href="../SourceCodePro-Semibold.ttf.woff2"><link rel="stylesheet" href="../normalize.css"><link rel="stylesheet" href="../rustdoc.css" id="mainThemeStyle"><link rel="stylesheet" href="../ayu.css" disabled><link rel="stylesheet" href="../dark.css" disabled><link rel="stylesheet" href="../light.css" id="themeStyle"><script id="default-settings" ></script><script src="../storage.js"></script><script defer src="../crates.js"></script><script defer src="../main.js"></script><noscript><link rel="stylesheet" href="../noscript.css"></noscript><link rel="alternate icon" type="image/png" href="../favicon-16x16.png"><link rel="alternate icon" type="image/png" href="../favicon-32x32.png"><link rel="icon" type="image/svg+xml" href="../favicon.svg"></head><body class="rustdoc mod crate"><!--[if lte IE 11]><div class="warning">This old browser is unsupported and will most likely display funky things.</div><![endif]--><nav class="mobile-topbar"><button class="sidebar-menu-toggle">&#9776;</button><a class="sidebar-logo" href="../raw_cpuid/index.html"><div class="logo-container"><img class="rust-logo" src="../rust-logo.svg" alt="logo"></div></a><h2></h2></nav><nav class="sidebar"><a class="sidebar-logo" href="../raw_cpuid/index.html"><div class="logo-container"><img class="rust-logo" src="../rust-logo.svg" alt="logo"></div></a><h2 class="location"><a href="#">Crate raw_cpuid</a></h2><div class="sidebar-elems"><ul class="block"><li class="version">Version 10.7.0</li><li><a id="all-types" href="all.html">All Items</a></li></ul><section><ul class="block"><li><a href="#modules">Modules</a></li><li><a href="#macros">Macros</a></li><li><a href="#structs">Structs</a></li><li><a href="#enums">Enums</a></li><li><a href="#constants">Constants</a></li></ul></section></div></nav><main><div class="width-limiter"><nav class="sub"><form class="search-form"><div class="search-container"><span></span><input class="search-input" name="search" autocomplete="off" spellcheck="false" placeholder="Click or press ‘S’ to search, ‘?’ for more options…" type="search"><div id="help-button" title="help" tabindex="-1"><a href="../help.html">?</a></div><div id="settings-menu" tabindex="-1"><a href="../settings.html" title="settings"><img width="22" height="22" alt="Change settings" src="../wheel.svg"></a></div></div></form></nav><section id="main-content" class="content"><div class="main-heading"><h1 class="fqn">Crate <a class="mod" href="#">raw_cpuid</a><button id="copy-path" onclick="copy_path(this)" title="Copy item path to clipboard"><img src="../clipboard.svg" width="19" height="18" alt="Copy item path"></button></h1><span class="out-of-band"><a class="srclink" href="../src/raw_cpuid/lib.rs.html#1-5663">source</a> · <a id="toggle-all-docs" href="javascript:void(0)" title="collapse all docs">[<span class="inner">&#x2212;</span>]</a></span></div><details class="rustdoc-toggle top-doc" open><summary class="hideme"><span>Expand description</span></summary><div class="docblock"><p>A library to parse the x86 CPUID instruction, written in rust with no
external dependencies. The implementation closely resembles the Intel CPUID
manual description. The library works with no_std.</p>
<h3 id="example"><a href="#example">Example</a></h3>
<div class="example-wrap"><pre class="rust rust-example-rendered"><code><span class="kw">use </span>raw_cpuid::CpuId;
<span class="kw">let </span>cpuid = CpuId::new();
<span class="kw">if let </span><span class="prelude-val">Some</span>(vf) = cpuid.get_vendor_info() {
<span class="macro">assert!</span>(vf.as_str() == <span class="string">&quot;GenuineIntel&quot; </span>|| vf.as_str() == <span class="string">&quot;AuthenticAMD&quot;</span>);
}
<span class="kw">let </span>has_sse = cpuid.get_feature_info().map_or(<span class="bool-val">false</span>, |finfo| finfo.has_sse());
<span class="kw">if </span>has_sse {
<span class="macro">println!</span>(<span class="string">&quot;CPU supports SSE!&quot;</span>);
}
<span class="kw">if let </span><span class="prelude-val">Some</span>(cparams) = cpuid.get_cache_parameters() {
<span class="kw">for </span>cache <span class="kw">in </span>cparams {
<span class="kw">let </span>size = cache.associativity() * cache.physical_line_partitions() * cache.coherency_line_size() * cache.sets();
<span class="macro">println!</span>(<span class="string">&quot;L{}-Cache size is {}&quot;</span>, cache.level(), size);
}
} <span class="kw">else </span>{
<span class="macro">println!</span>(<span class="string">&quot;No cache parameter information available&quot;</span>)
}</code></pre></div>
<h2 id="platform-support"><a href="#platform-support">Platform support</a></h2>
<p>CPU vendors may choose to not support certain functions/leafs in cpuid or
only support them partially. We highlight this with the following emojis
throughout the documentation:</p>
<ul>
<li>✅: This struct/function is fully supported by the vendor.</li>
<li>🟡: This struct is partially supported by the vendor, refer to individual
functions for more information.</li>
<li>❌: This struct/function is not supported by the vendor. When queried on
this platform, we will return None/false/0 (or some other sane default).</li>
<li>❓: This struct/function is not supported by the vendor according to the
manual, but the in practice it still may return valid information.</li>
</ul>
<p>Note that the presence of a ✅ does not guarantee that a specific feature
will exist for your CPU – just that it is potentially supported by the
vendor on some of its chips. You will still have to query it at runtime.</p>
</div></details><h2 id="modules" class="small-section-header"><a href="#modules">Modules</a></h2><div class="item-table"><div class="item-row"><div class="item-left module-item"><a class="mod" href="native_cpuid/index.html" title="raw_cpuid::native_cpuid mod">native_cpuid</a></div><div class="item-right docblock-short">Uses Rust’s <code>cpuid</code> function from the <code>arch</code> module.</div></div></div><h2 id="macros" class="small-section-header"><a href="#macros">Macros</a></h2><div class="item-table"><div class="item-row"><div class="item-left module-item"><a class="macro" href="macro.cpuid.html" title="raw_cpuid::cpuid macro">cpuid</a></div><div class="item-right docblock-short">Macro which queries cpuid directly.</div></div></div><h2 id="structs" class="small-section-header"><a href="#structs">Structs</a></h2><div class="item-table"><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ApmInfo.html" title="raw_cpuid::ApmInfo struct">ApmInfo</a></div><div class="item-right docblock-short">Processor Power Management and RAS Capabilities (LEAF=0x8000_0007).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.CacheInfo.html" title="raw_cpuid::CacheInfo struct">CacheInfo</a></div><div class="item-right docblock-short">Describes any kind of cache (TLB, Data and Instruction caches plus prefetchers).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.CacheInfoIter.html" title="raw_cpuid::CacheInfoIter struct">CacheInfoIter</a></div><div class="item-right docblock-short">Iterates over cache information (LEAF=0x02).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.CacheParameter.html" title="raw_cpuid::CacheParameter struct">CacheParameter</a></div><div class="item-right docblock-short">Information about an individual cache in the hierarchy.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.CacheParametersIter.html" title="raw_cpuid::CacheParametersIter struct">CacheParametersIter</a></div><div class="item-right docblock-short">Iterator over caches (LEAF=0x04).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.CpuId.html" title="raw_cpuid::CpuId struct">CpuId</a></div><div class="item-right docblock-short">The main type used to query information about the CPU we’re running on.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.CpuIdResult.html" title="raw_cpuid::CpuIdResult struct">CpuIdResult</a></div><div class="item-right docblock-short">Low-level data-structure to store result of cpuid instruction.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.DatInfo.html" title="raw_cpuid::DatInfo struct">DatInfo</a></div><div class="item-right docblock-short">Deterministic Address Translation Structure</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.DatIter.html" title="raw_cpuid::DatIter struct">DatIter</a></div><div class="item-right docblock-short">Deterministic Address Translation Structure Iterator (LEAF=0x18).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.DirectCacheAccessInfo.html" title="raw_cpuid::DirectCacheAccessInfo struct">DirectCacheAccessInfo</a></div><div class="item-right docblock-short">Direct cache access info (LEAF=0x09).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.EpcSection.html" title="raw_cpuid::EpcSection struct">EpcSection</a></div><div class="item-right docblock-short">EBX:EAX and EDX:ECX provide information on the Enclave Page Cache (EPC) section</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ExtendedFeatures.html" title="raw_cpuid::ExtendedFeatures struct">ExtendedFeatures</a></div><div class="item-right docblock-short">Structured Extended Feature Identifiers (LEAF=0x07).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ExtendedProcessorFeatureIdentifiers.html" title="raw_cpuid::ExtendedProcessorFeatureIdentifiers struct">ExtendedProcessorFeatureIdentifiers</a></div><div class="item-right docblock-short">Extended Processor and Processor Feature Identifiers (LEAF=0x8000_0001)</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ExtendedState.html" title="raw_cpuid::ExtendedState struct">ExtendedState</a></div><div class="item-right docblock-short">ExtendedState subleaf structure for things that need to be restored.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ExtendedStateInfo.html" title="raw_cpuid::ExtendedStateInfo struct">ExtendedStateInfo</a></div><div class="item-right docblock-short">Information for saving/restoring extended register state (LEAF=0x0D).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ExtendedStateIter.html" title="raw_cpuid::ExtendedStateIter struct">ExtendedStateIter</a></div><div class="item-right docblock-short">Yields <a href="struct.ExtendedState.html" title="ExtendedState">ExtendedState</a> structs.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ExtendedTopologyIter.html" title="raw_cpuid::ExtendedTopologyIter struct">ExtendedTopologyIter</a></div><div class="item-right docblock-short">Information about topology (LEAF=0x0B).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ExtendedTopologyLevel.html" title="raw_cpuid::ExtendedTopologyLevel struct">ExtendedTopologyLevel</a></div><div class="item-right docblock-short">Gives information about the current level in the topology.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.FeatureInfo.html" title="raw_cpuid::FeatureInfo struct">FeatureInfo</a></div><div class="item-right docblock-short">Processor and Processor Feature Identifiers (LEAF=0x01).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.HypervisorInfo.html" title="raw_cpuid::HypervisorInfo struct">HypervisorInfo</a></div><div class="item-right docblock-short">Information about Hypervisor (LEAF=0x4000_0001)</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.L1CacheTlbInfo.html" title="raw_cpuid::L1CacheTlbInfo struct">L1CacheTlbInfo</a></div><div class="item-right docblock-short">L1 Cache and TLB Information (LEAF=0x8000_0005).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.L2And3CacheTlbInfo.html" title="raw_cpuid::L2And3CacheTlbInfo struct">L2And3CacheTlbInfo</a></div><div class="item-right docblock-short">L2/L3 Cache and TLB Information (LEAF=0x8000_0006).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.L2CatInfo.html" title="raw_cpuid::L2CatInfo struct">L2CatInfo</a></div><div class="item-right docblock-short">L2 Cache Allocation Technology Enumeration Sub-leaf (LEAF=0x10, SUBLEAF=2).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.L3CatInfo.html" title="raw_cpuid::L3CatInfo struct">L3CatInfo</a></div><div class="item-right docblock-short">L3 Cache Allocation Technology Enumeration Sub-leaf (LEAF=0x10, SUBLEAF=1).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.L3MonitoringInfo.html" title="raw_cpuid::L3MonitoringInfo struct">L3MonitoringInfo</a></div><div class="item-right docblock-short">Information about L3 cache monitoring.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.MemBwAllocationInfo.html" title="raw_cpuid::MemBwAllocationInfo struct">MemBwAllocationInfo</a></div><div class="item-right docblock-short">Memory Bandwidth Allocation Enumeration Sub-leaf (LEAF=0x10, SUBLEAF=3).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.MemoryEncryptionInfo.html" title="raw_cpuid::MemoryEncryptionInfo struct">MemoryEncryptionInfo</a></div><div class="item-right docblock-short">Encrypted Memory Capabilities (LEAF=0x8000_001F).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.MonitorMwaitInfo.html" title="raw_cpuid::MonitorMwaitInfo struct">MonitorMwaitInfo</a></div><div class="item-right docblock-short">Information about how monitor/mwait works on this CPU (LEAF=0x05).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.PerformanceMonitoringInfo.html" title="raw_cpuid::PerformanceMonitoringInfo struct">PerformanceMonitoringInfo</a></div><div class="item-right docblock-short">Info about performance monitoring – how many counters etc. (LEAF=0x0A)</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.PerformanceOptimizationInfo.html" title="raw_cpuid::PerformanceOptimizationInfo struct">PerformanceOptimizationInfo</a></div><div class="item-right docblock-short">Performance Optimization Identifier (LEAF=0x8000_001A).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ProcessorBrandString.html" title="raw_cpuid::ProcessorBrandString struct">ProcessorBrandString</a></div><div class="item-right docblock-short">Processor name (LEAF=0x8000_0002..=0x8000_0004).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ProcessorCapacityAndFeatureInfo.html" title="raw_cpuid::ProcessorCapacityAndFeatureInfo struct">ProcessorCapacityAndFeatureInfo</a></div><div class="item-right docblock-short">Processor Capacity Parameters and Extended Feature Identification
(LEAF=0x8000_0008).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ProcessorFrequencyInfo.html" title="raw_cpuid::ProcessorFrequencyInfo struct">ProcessorFrequencyInfo</a></div><div class="item-right docblock-short">Processor Frequency Information (LEAF=0x16).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ProcessorSerial.html" title="raw_cpuid::ProcessorSerial struct">ProcessorSerial</a></div><div class="item-right docblock-short">Processor Serial Number (LEAF=0x3).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ProcessorTopologyInfo.html" title="raw_cpuid::ProcessorTopologyInfo struct">ProcessorTopologyInfo</a></div><div class="item-right docblock-short">Processor Topology Information (LEAF=0x8000_001E).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ProcessorTraceInfo.html" title="raw_cpuid::ProcessorTraceInfo struct">ProcessorTraceInfo</a></div><div class="item-right docblock-short">Intel Processor Trace Information (LEAF=0x14).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.RdtAllocationInfo.html" title="raw_cpuid::RdtAllocationInfo struct">RdtAllocationInfo</a></div><div class="item-right docblock-short">Quality of service enforcement information (LEAF=0x10).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.RdtMonitoringInfo.html" title="raw_cpuid::RdtMonitoringInfo struct">RdtMonitoringInfo</a></div><div class="item-right docblock-short">Intel Resource Director Technology RDT (LEAF=0x0F).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.SgxInfo.html" title="raw_cpuid::SgxInfo struct">SgxInfo</a></div><div class="item-right docblock-short">Intel SGX Capability Enumeration Leaf (LEAF=0x12).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.SgxSectionIter.html" title="raw_cpuid::SgxSectionIter struct">SgxSectionIter</a></div><div class="item-right docblock-short">Iterator over the SGX sub-leafs (ECX &gt;= 2).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.SoCVendorAttributesIter.html" title="raw_cpuid::SoCVendorAttributesIter struct">SoCVendorAttributesIter</a></div><div class="item-right docblock-short">Iterator for SoC vendor attributes.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.SoCVendorBrand.html" title="raw_cpuid::SoCVendorBrand struct">SoCVendorBrand</a></div><div class="item-right docblock-short">A vendor brand string as queried from the cpuid leaf.</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.SoCVendorInfo.html" title="raw_cpuid::SoCVendorInfo struct">SoCVendorInfo</a></div><div class="item-right docblock-short">SoC vendor specific information (LEAF=0x17).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.SvmFeatures.html" title="raw_cpuid::SvmFeatures struct">SvmFeatures</a></div><div class="item-right docblock-short">Information about the SVM features that the processory supports (LEAF=0x8000_000A).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.ThermalPowerInfo.html" title="raw_cpuid::ThermalPowerInfo struct">ThermalPowerInfo</a></div><div class="item-right docblock-short">Query information about thermal and power management features of the CPU (LEAF=0x06).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.Tlb1gbPageInfo.html" title="raw_cpuid::Tlb1gbPageInfo struct">Tlb1gbPageInfo</a></div><div class="item-right docblock-short">TLB 1-GiB Pages Information (LEAF=0x8000_0019).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.TscInfo.html" title="raw_cpuid::TscInfo struct">TscInfo</a></div><div class="item-right docblock-short">Time Stamp Counter/Core Crystal Clock Information (LEAF=0x15).</div></div><div class="item-row"><div class="item-left module-item"><a class="struct" href="struct.VendorInfo.html" title="raw_cpuid::VendorInfo struct">VendorInfo</a></div><div class="item-right docblock-short">Vendor Info String (LEAF=0x0)</div></div></div><h2 id="enums" class="small-section-header"><a href="#enums">Enums</a></h2><div class="item-table"><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.Associativity.html" title="raw_cpuid::Associativity enum">Associativity</a></div><div class="item-right docblock-short">Info about cache Associativity.</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.CacheInfoType.html" title="raw_cpuid::CacheInfoType enum">CacheInfoType</a></div><div class="item-right docblock-short">What type of cache are we dealing with?</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.CacheType.html" title="raw_cpuid::CacheType enum">CacheType</a></div><div class="item-right docblock-short">Info about a what a given cache caches (instructions, data, etc.)</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.DatType.html" title="raw_cpuid::DatType enum">DatType</a></div><div class="item-right docblock-short">Deterministic Address Translation cache type (EDX bits 04 – 00)</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.ExtendedRegisterStateLocation.html" title="raw_cpuid::ExtendedRegisterStateLocation enum">ExtendedRegisterStateLocation</a></div><div class="item-right docblock-short">Where the extended register state is stored.</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.ExtendedRegisterType.html" title="raw_cpuid::ExtendedRegisterType enum">ExtendedRegisterType</a></div><div class="item-right docblock-short">What kidn of extended register state this is.</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.Hypervisor.html" title="raw_cpuid::Hypervisor enum">Hypervisor</a></div><div class="item-right docblock-short">Identifies the different Hypervisor products.</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.SgxSectionInfo.html" title="raw_cpuid::SgxSectionInfo enum">SgxSectionInfo</a></div><div class="item-right docblock-short">Intel SGX EPC Enumeration Leaf</div></div><div class="item-row"><div class="item-left module-item"><a class="enum" href="enum.TopologyType.html" title="raw_cpuid::TopologyType enum">TopologyType</a></div><div class="item-right docblock-short">What type of core we have at this level in the topology (real CPU or hyper-threaded).</div></div></div><h2 id="constants" class="small-section-header"><a href="#constants">Constants</a></h2><div class="item-table"><div class="item-row"><div class="item-left module-item"><a class="constant" href="constant.CACHE_INFO_TABLE.html" title="raw_cpuid::CACHE_INFO_TABLE constant">CACHE_INFO_TABLE</a></div><div class="item-right docblock-short">This table is taken from Intel manual (Section CPUID instruction).</div></div></div></section></div></main><div id="rustdoc-vars" data-root-path="../" data-current-crate="raw_cpuid" data-themes="ayu,dark,light" data-resource-suffix="" data-rustdoc-version="1.66.0-nightly (5c8bff74b 2022-10-21)" ></div></body></html>