| commit | 5bd9c6a8b487234e18069c887b3f6271c97292f7 | [log] [tgz] |
|---|---|---|
| author | ZHANG Hao <zhanghao@4paradigm.com> | Fri Dec 11 10:12:58 2020 +0800 |
| committer | GitHub <noreply@github.com> | Thu Dec 10 18:12:58 2020 -0800 |
| tree | d161f3682f5f945a4a4d930e65f113b3e191d125 | |
| parent | 57db5a718c74a788c98120ebbe1230797be698c8 [diff] |
[Hardware][OpenCL] Intelfocl support (#9) * - static auto-tune sample config - add mul, load_int8 - some bugfix for bits width * Extract hw_spec_const.h out of hw_spec.h Rename VTA_MEM_ID_ACC_8 to VTA_MEM_ID_ACC_8BIT * Add OpenCL kernel sources for Intel OpenCL for FPGA devices * Add driver sources to support Intel OpenCL for FPGA devices * intelfocl sample configuration for VTA added * Workaround for Signedness bug in Intel OpenCL for FPGA compiler * remove some comments * rename cpp to cc * change UOP src_idx size to max(inp, acc) * Move AOCLUtils into 3rdpary directory on TVM * bump the intelfocl HW_VER to 0.0.2 * Bump all the HW_VER to 0.0.2 as there is a ISA change * Address cpplint issues * Fix cpplint errors for indentations * api to init device from outside * Split OpenCL init and FPGA setup code * Add comment for cleanup() callback * Assert error for unsupported input/weight/accu types * Add Apache Software Foundation headers * Address cpplint issues * Drop dependency on 3rd party library aoclutils, preparing for Xilinx support * Xilinx Vitis does not allow local_work_size to be omitted * Suppress warnings for deprecated clCreateCommandQueue (clCreateCommandQueueWithProperties not supported by Xilinx) * Rename intelfocl_ to oclfpga_ as both Intel & Xilinx are supported * Rename string literals and code structures for Xilinx Vitis support * Rename aocx to bitstream as part of Xilinx Vitis support * Remove obsolete vta-cost python script * Add comments for MEM_ADDR_IDENTIFIER constant * Apply CamelCase for function names * Add comments for OCLFPGADevice member functions * 2-space indentation for .cl files * Add README to hardware/intelfocl * Update README.rst * Update README.rst * update to trigger ci * disable tsim test: quick fix for test fails due to ISA changes * TESTING * disable tsim test in docker_bash.sh * cleanup code Co-authored-by: Li Jiashu <lijiashu@4paradigm>
VTA (versatile tensor accelerator) is an open-source deep learning accelerator complemented with an end-to-end TVM-based compiler stack.
The key features of VTA include: