)]}' { "log": [ { "commit": "2b5509e48ae6264a458269813a21b7dfb6130d16", "tree": "e636df73ec7bb826039c88f2bcb46ad1b89e6b91", "parents": [ "a79734d6dff6445095da772f9c3c16784390a04a" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Thu Jul 30 14:16:04 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 15 09:00:20 2026 -0300" }, "message": "arch/x86: Provide vfork().\n\nx86 selected neither fork primitive, so vfork() was not available on this\narchitecture at all.\n\nfork.S takes the register snapshot and hands it to x86_fork(), which allocates\nthe child, copies the used part of the caller\u0027s stack, and starts it. There is\none entry point for both primitives, because the snapshot is the same for\neither.\n\nUnlike the register-passing architectures, cdecl puts the flag on the stack, so\nup_fork() loads it from 4(%esp). That slot is also the stack pointer the\ncaller had: it pushed the argument, then `call\u0027 pushed the return address. So\nthe low end of the region that x86_fork() copies is unchanged.\n\nPOSIX fork() is not provided. It needs an address environment that can be\nduplicated and this architecture has none, so CONFIG_ARCH_HAVE_FORK is never\nset here. x86_fork.c makes that a build error rather than a silent omission.\n\nVerified under QEMU with qemu-i486:nsh. ostest runs to the end and reports\n\"Child 5 ran and exited before the parent resumed\", with fork() correctly\nabsent.\n\nAssisted-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "a79734d6dff6445095da772f9c3c16784390a04a", "tree": "04cb140d0a7e13177a45054b332290d112594172", "parents": [ "36a971567ac706b86fb9e94cceeb3c81083da344" ], "author": { "name": "AbhinavMir", "email": "atg271@gmail.com", "time": "Thu Aug 13 16:44:19 2026 -0700" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Sat Aug 15 11:51:19 2026 +0800" }, "message": "wireless/bluetooth/bt_hcicore.c: Balance conn and buffer refs in hci_acl().\n\nhci_acl() looked up the connection with bt_conn_lookup_handle(), which\nreturns a new reference, but never released it. This leaked one conn\nreference for every received ACL packet.\n\nbt_conn_receive() also consumes the buffer on every path: it forwards\nto l2cap (which releases) or stores the buffer in conn-\u003erx without an\naddref. The hci_rx_work() worker then called bt_buf_release() on the\nsame buffer, which caused a double free or use-after-free.\n\nTake an extra buffer reference for the worker to release, and release\nthe connection reference from the lookup.\n\nAssisted-by: Fable\nSigned-off-by: AbhinavMir \u003catg271@gmail.com\u003e\n" }, { "commit": "36a971567ac706b86fb9e94cceeb3c81083da344", "tree": "f43cec6e35c442e22762c3404491ea4fd34d759c", "parents": [ "214d02f417119997bebfc162dc8b622a5f361446" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Thu Aug 13 10:21:18 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Fri Aug 14 11:36:37 2026 -0300" }, "message": "arch/arm/rtl8721f: add SPI master driver support\n\nWire the shared Ameba SPI (DesignWare SSI) driver\n(arch/arm/src/common/ameba/ameba_spi.c) into the RTL8721F (amebagreen2)\nbuild and expose the SPI0/SPI1 masters at /dev/spiN.\n\nAdd the per-chip ameba_spi_chip.h with the amebagreen2 controller bases\n(0x40121000 / 0x40122000, non-secure aliases), the group-0 SPI clock masks\n(bit14/bit15), and the per-signal crossbar pad-mux codes (SPI0 75/76/77/78,\nSPI1 79/80/81/82). The SSI ip_clk is the PERI_HCLK-domain clock, which the\namebagreen2 fwlib exposes directly through HPERI_ClkGet(), so AMEBA_SPI_IPCLK()\nis a single ROM call rather than the register poking the other ICs need.\n\nCompile the common driver and the SDK fwlib SSI RAM source under\nCONFIG_AMEBA_SPI, register the bus in the board bring-up, and add an \"spi\"\nboard configuration exercising the system/spi spitool.\n\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\n" }, { "commit": "214d02f417119997bebfc162dc8b622a5f361446", "tree": "4154958d6e45fe3e4e16da4dcdbedbc343f0947c", "parents": [ "7dbf782e5bb978f42e181416f9daf509c1bb5746" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Thu Aug 13 10:09:28 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Fri Aug 14 11:36:37 2026 -0300" }, "message": "arch/arm/rtl8720f: add SPI master driver support\n\nWire the shared Ameba SPI (DesignWare SSI) driver\n(arch/arm/src/common/ameba/ameba_spi.c) into the RTL8720F build and expose\nthe SPI0/SPI1 masters at /dev/spiN.\n\nAdd the per-chip ameba_spi_chip.h with the RTL8720F controller bases\n(0x401C1000 / 0x401C2000, non-secure aliases), the group-0 SPI clock masks,\nthe per-signal crossbar pad-mux codes (RTL8720F has no generic\nPINMUX_FUNCTION_SPI), and the SYS_PLL-based ip_clk computation\n(REG_LSYS_CKD_SYS_PLL_GRP0 HPERI divider). The chip header declares the\nSYS_PLL_ClkGet() query its AMEBA_SPI_IPCLK() uses, since RTL8720F has no\nPLL_ClkGet().\n\nCompile the common driver and the SDK fwlib SSI RAM source under\nCONFIG_AMEBA_SPI, register the bus in the board bring-up, and add an \"spi\"\nboard configuration exercising the system/spi spitool.\n\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\n" }, { "commit": "7dbf782e5bb978f42e181416f9daf509c1bb5746", "tree": "b8dbb46c0754e4953cb6e9a9950f826c67efa595", "parents": [ "e5a0c4ae88ff0e4d5ca998564562d6b5237454d5" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Mon Jul 20 11:47:46 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Fri Aug 14 11:36:37 2026 -0300" }, "message": "arch/arm/rtl8721dx: add shared Ameba SPI driver\n\nAdd a shared NuttX SPI master lower-half for the Realtek Ameba SPI\ncontrollers (SPI0/SPI1) in arch/arm/src/common/ameba, driven through the\nSDK fwlib in polling mode with full-duplex exchange and a software chip\nselect. Per-chip wiring (controller count, register bases, clock masks,\ncrossbar pad-mux codes and the fwlib SSI_InitTypeDef layout) lives in\narch/arm/src/rtl8721dx/ameba_spi_chip.h so a port to the other Ameba\nchips only supplies a same-named header.\n\nEach controller registers as /dev/spiN from pke8721daf bring-up through\nthe stock SPI character driver; a dedicated `spi` defconfig drives the\nspitool for validation.\n\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\n" }, { "commit": "e5a0c4ae88ff0e4d5ca998564562d6b5237454d5", "tree": "56f1725dc4bb0c8370c225c7d517c436840964e8", "parents": [ "234c1684d5a89eac9599746a3d9cf1deeb3202d3" ], "author": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Fri Aug 14 12:43:00 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 19:57:07 2026 +0800" }, "message": "sim: update Makefile to match Cmake config\n\nfollow the 3b1aea4bb0f7af36ca931ca969f360b001830fa8 commit and update the include\n\nSigned-off-by: Alin Jerpelea \u003calin.jerpelea@sony.com\u003e\n" }, { "commit": "234c1684d5a89eac9599746a3d9cf1deeb3202d3", "tree": "6034d4e48ddd12f1bcdea728599961729288e51a", "parents": [ "fbfb1b95f745bde9e4a897ea436b033116c412fc" ], "author": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Fri Aug 14 12:32:29 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 19:57:07 2026 +0800" }, "message": "sim: fix LAME inclusion typo\n\nthe LAME and LIBMAD AUDIOUTILS are not corectly selected\n\nSigned-off-by: Alin Jerpelea \u003calin.jerpelea@sony.com\u003e\n" }, { "commit": "fbfb1b95f745bde9e4a897ea436b033116c412fc", "tree": "d127dca32f0315230ac2d1b2289b97f1a7339f3e", "parents": [ "998bb865ecc98a0f74b15fd1992b7f577cb7e38f" ], "author": { "name": "fangpeina", "email": "fangpeina@xiaomi.com", "time": "Fri Aug 14 18:22:16 2026 +0800" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Fri Aug 14 13:47:04 2026 +0200" }, "message": "Documentation/applications/system: Add stty command documentation\n\nAdd documentation for the stty terminal configuration utility,\ndescribing usage, available settings, examples, and configuration\noptions.\n\nSigned-off-by: fangpeina \u003cfangpeina@xiaomi.com\u003e\n" }, { "commit": "998bb865ecc98a0f74b15fd1992b7f577cb7e38f", "tree": "ae3f119938c0f339303dbb23e074ab1a0ddc9d38", "parents": [ "36bcebb9c4a9d9c3885be9bac1fe92f86772fa6a" ], "author": { "name": "Tomasz \u0027CeDeROM\u0027 CEDRO", "email": "tomek@cedro.info", "time": "Fri Aug 14 00:16:46 2026 +0200" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Fri Aug 14 08:03:15 2026 +0200" }, "message": "tools/mkversion: Fix missing free in case of error.\n\n* According to strdup(3) manual strdup() allocates memory with malloc(3)\n and that memory should be released with free(3) when no longer needed.\n* For non existent path or file open error mkversion used exit() with no\n prior free() for allocated memory.\n* This change introduces ret variable, exit label, and free on exit in order\n to avoid potential memory leak.\n* tools/mkversion is a tiny short-lived utility and the memory gets freed\n by the OS upon application termination so that was not a bit issue, but now\n memory leak scanners should be happy as we have free() in pair to strdup().\n\nReported-by: xjDeng.\n\nSigned-off-by: Tomasz \u0027CeDeROM\u0027 CEDRO \u003ctomek@cedro.info\u003e\n" }, { "commit": "36bcebb9c4a9d9c3885be9bac1fe92f86772fa6a", "tree": "75a0bfc8861e7c54868a0af694c9a574d15e121a", "parents": [ "fdcd0ec317ad6ba4d257d9fe4641005ca7b83231" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 14:43:35 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 10:20:52 2026 +0800" }, "message": "boards: sim: enable CONFIG_LIBC_LOCALTIME for sim:toybox\n\ntzset() is unconditionally defined in libs/libc/time/lib_localtime.c,\nbut its prototype in \u003ctime.h\u003e is gated behind CONFIG_LIBC_LOCALTIME --\nwithout it, Toybox\u0027s own tzset() calls (lib/xwrap.c, toys/posix/date.c)\ncompile as implicit declarations instead. The stm32f4discovery:toybox\ndefconfig already carries this option (see its own commit message);\nsim:toybox\u0027s was simply missing it.\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Sonnet 5 \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "fdcd0ec317ad6ba4d257d9fe4641005ca7b83231", "tree": "a4b5643cef5e933ba28c6818591535ee6f688894", "parents": [ "edbc03e40a3acea0be2dfa992c42a5a251fce412" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Tue Jul 28 04:30:54 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 10:20:52 2026 +0800" }, "message": "Documentation: add apps/system/toybox entry\n\nBasic usage/configuration reference for the toybox application, plus\nknown limitations: ps lists no processes (it expects Linux\u0027s\n/proc/\u003cpid\u003e/stat, which NuttX\u0027s procfs doesn\u0027t provide), and grep -r\nis unreliable against procfs.\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Sonnet 5 \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "edbc03e40a3acea0be2dfa992c42a5a251fce412", "tree": "dd2c7eb7bca924bb93e2d54fd8e7e472cf8180fc", "parents": [ "9f0f886c305cb5d5b67fa6f4167d76b1ab01b4e5" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Tue Jul 28 05:11:51 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 10:20:52 2026 +0800" }, "message": "boards: stm32f4discovery: add toybox defconfig\n\nSame shape as boards/sim/sim/sim/configs/toybox: CONFIG_SYSTEM_TOYBOX\u003dy\nwith CONFIG_INIT_ENTRYPOINT\u003d\"toybox_main\", built on top of the existing\nstm32f4discovery:nsh defconfig\u0027s board/console setup.\n\nNeeds several options nsh\u0027s defconfig doesn\u0027t, since Toybox\u0027s library\ncode references more of NuttX\u0027s libc unconditionally than NSH does:\nCONFIG_ALLOW_MIT_COMPONENTS (gates CONFIG_LIBC_REGEX -- grep/sed/etc),\nCONFIG_ARCH_SETJMP_H (sigjmp_buf; the REPL\u0027s rebound trap uses\nsigsetjmp/siglongjmp), CONFIG_LIBC_EXECFUNCS, CONFIG_LIBC_LOCALE,\nCONFIG_LIBC_LOCALTIME, CONFIG_PIPES, CONFIG_PSEUDOFS_SOFTLINKS,\nCONFIG_FS_NOTIFY (tail -f), CONFIG_SCHED_HAVE_PARENT (waitpid()).\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Sonnet 5 \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "9f0f886c305cb5d5b67fa6f4167d76b1ab01b4e5", "tree": "316b64c81135c23bffb72ede124adfd869c71471", "parents": [ "c1891e07c913450f7065a43f4aabd7c18b0efa27" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Tue Jul 28 04:30:23 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 10:20:52 2026 +0800" }, "message": "boards: sim: add sim:toybox defconfig\n\nCONFIG_SYSTEM_TOYBOX\u003dy with CONFIG_INIT_ENTRYPOINT\u003d\"toybox_main\":\nToybox as the system\u0027s shell instead of NSH. No NSH config is present\n-- Toybox has no dependency on it in either direction (see\napps/system/toybox/Kconfig\u0027s SYSTEM_TOYBOX_BUILTIN_BRIDGE).\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Sonnet 5 \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "c1891e07c913450f7065a43f4aabd7c18b0efa27", "tree": "665b64d7be383d6617587a0843a225264edbe2fb", "parents": [ "3cbf6f21680d240481d7b69cd1e3dd0fc183914e" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Wed Jul 29 22:02:16 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 10:20:52 2026 +0800" }, "message": "fs: resolve a trailing lone \u0027.\u0027 path component\n\ninode_nextname() already skipped a \u0027.\u0027 segment mid-path (e.g. \"./foo\"),\nbut only checked for a \u0027/\u0027 right after it -- a path ending in a bare\n\u0027.\u0027 (e.g. \"/foo/.\", or \".\" itself once AT_FDCWD resolution prepends\n$PWD) fell through and was looked up as a literal child named \".\",\nwhich no real node is ever named, failing with ENOENT.\n\nThis broke every \"operate on the current directory\" idiom relative\npaths rely on: bare `ls`, `stat .`, `cd .`, etc., all failed outright\neven though the equivalent absolute path worked fine. Found while\ntesting the Toybox port\u0027s interactive REPL, but this is generic VFS\npath resolution, not Toybox-specific.\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Sonnet 5 \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "3cbf6f21680d240481d7b69cd1e3dd0fc183914e", "tree": "e295f8a91e1124b540e79bba22b34a03f797faa3", "parents": [ "3635004dcd8d0959092f9e5b36a44f6eb177bc1c" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Wed Jul 29 17:40:28 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 10:20:52 2026 +0800" }, "message": "libc: add wait4()\n\nwait4() is BSD/Linux-standard (used by toybox\u0027s \"time\" applet) but NuttX\nonly had waitpid()+getrusage() separately. Add it to libs/libc/unistd/\nbuilt on top of those two existing primitives, so it needs no syscall\nplumbing of its own and works unmodified across flat/protected/kernel\nbuild separation. Prototype added to include/sys/wait.h.\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Sonnet 5 \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "3635004dcd8d0959092f9e5b36a44f6eb177bc1c", "tree": "500ae97e8b2b7d87add3cb192188d08e304119a0", "parents": [ "198747322c1c701f770c7872c77edc49f6f22f86" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Tue Jul 28 04:07:16 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 10:20:52 2026 +0800" }, "message": "libs/libc/grp: fix getgrbuf_r() pointer-alignment padding\n\npadlen \u003d sizeof(void *) - (addr % sizeof(void *)) never returns 0, even\nwhen addr is already pointer-aligned -- it returns a full alignment unit\ninstead. Since callers size buflen for zero padding, the subsequent\n\"buflen \u003c padlen + reqdlen\" check then always fails, so getgrgid()/\ngetgrnam() and their _r variants always return ERANGE.\n\nFound via `id` on sim:toybox, which resolves gid 0 to \"root\" through\nthis path.\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Sonnet 5 \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "198747322c1c701f770c7872c77edc49f6f22f86", "tree": "86c4a643dfa1d0c2c4eede73ab76e65c361b905f", "parents": [ "3f38ca2729ff5b517af6d2e60e44e8970672b429" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Thu Aug 13 18:52:55 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 09:49:27 2026 +0800" }, "message": "boards/lm3s6965-ek: Link the protected kernel against kflash.\n\nIn a protected build the kernel must stay in the flash half that\nmemory.ld gives it. ARCHSCRIPT selected ld.script, which declares the\nwhole 256 KiB of flash as one region, so nothing held the kernel to its\nhalf. The kernel image grew past the boundary unseen: its .data\ninitialiser ran 1384 bytes into 0x00020000, where the user image is\nprogrammed.\n\nSelect memory.ld and kernel-space.ld when CONFIG_BUILD_PROTECTED is set.\nThe link now fails when the kernel does not fit.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "3f38ca2729ff5b517af6d2e60e44e8970672b429", "tree": "91a963d7d851a7503d09086d0610e3b9fdaa43c2", "parents": [ "e64b28974bf9dd68b049919bd574c58b9ab6df83" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Thu Aug 13 18:51:28 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Fri Aug 14 09:49:27 2026 +0800" }, "message": "boards/lm3s6965-ek: Trim qemu-protected to fit the part.\n\nThe protected build gives the kernel the first 128 KiB of flash and the\nuser image the second. Both halves were full. The kernel image was\n132456 bytes and the user image 130668, which is 1308 bytes more than\nthe 256 KiB the LM3S6965 has. The two images overlapped.\n\nRemove from the configuration what QEMU cannot use, and what other\nconfigurations of this board already cover: MMC/SD over SPI with SSI0,\nbecause the QEMU model has no SSI; semihosting hostfs; the GPIO\ninterrupt ports, which no driver in this configuration uses; and the\nwget example with its web client.\n\nThe kernel image is now 124580 bytes and the user image 125500. Each\nhalf has more than 5 KiB free.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "e64b28974bf9dd68b049919bd574c58b9ab6df83", "tree": "e4321fec27c76b050844900e749d76a4d8acd4c6", "parents": [ "45657b976b25b978f0f26db1287127f17a4a775b" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Thu Aug 13 12:22:36 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Thu Aug 13 13:09:35 2026 -0300" }, "message": "boards/nrf5340-dk: configure HFXO capacitance\n\nThe nRF5340 DK uses the HFXO internal load capacitors at 7 pF.\nProvide the board value so nrf53_oscconfig() programs XOSC32MCAPS\ninstead of leaving the radio crystal untrimmed.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\n" }, { "commit": "45657b976b25b978f0f26db1287127f17a4a775b", "tree": "7a363ba116bb78f0a96b7e8a45238ea847289126", "parents": [ "3ac88f0f97663426dc699e5e28d5d9a3ec8b7e35" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Thu Aug 13 12:22:36 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Thu Aug 13 21:52:30 2026 +0800" }, "message": "arch/nrf53: fix HFXO trim field extraction\n\nfix HFXO trim field extraction\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\n" }, { "commit": "3ac88f0f97663426dc699e5e28d5d9a3ec8b7e35", "tree": "0d81968f65b2af452d9664e2bf65ebf7e77771a9", "parents": [ "0735bc16b95964c99b108045784253871318b032" ], "author": { "name": "Ricard Rosson", "email": "ricard@groundbits.com", "time": "Tue Aug 11 09:13:42 2026 +0100" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Thu Aug 13 09:54:26 2026 -0300" }, "message": "drivers/lcd: honour the LCD_APA102_* settings in the apa102 LCD driver\n\ndrivers/lcd/Kconfig offers CONFIG_LCD_APA102_XRES, CONFIG_LCD_APA102_YRES and\nCONFIG_LCD_APA102_FREQUENCY under \"if LCD_APA102\", but apa102_lcd.c tests for\nCONFIG_APA102_XRES, CONFIG_APA102_YRES and CONFIG_APA102_FREQUENCY, which no\nKconfig file defines. The #ifndef fallbacks therefore always win and the\nmatrix geometry is hard-wired to 16x16 no matter what is configured. The\nfrequency setting is doubly dead: even the fallback is unused, because\napa102_configspi() calls SPI_SETFREQUENCY() with APA102_SPI_MAXFREQUENCY from\ninclude/nuttx/leds/apa102.h, which is 100 kHz (its \"Default 4MHz\" comment\nnotwithstanding), so the chain is always clocked at 100 kHz.\n\nUse the names the Kconfig actually defines and drive the bus at the\nconfigured frequency. The fallback definitions are kept for an\nout-of-Kconfig build and given the Kconfig defaults; 16x16 keeps the previous\ngeometry for anyone who never set the options.\n\nVerified on stm32f4discovery:nsh with CONFIG_LCD_APA102_XRES\u003d8,\nCONFIG_LCD_APA102_YRES\u003d4 and CONFIG_LCD_APA102_FREQUENCY\u003d4000000: the shadow\nframebuffer in g_apa102dev shrinks to 8x4 LEDs and the SPI frequency\nargument is 0x003d0900, where before the settings had no effect at all.\n\nSigned-off-by: Ricard Rosson \u003cricard@groundbits.com\u003e\nAssisted-by: Claude Opus 5 (Claude Code)\n" }, { "commit": "0735bc16b95964c99b108045784253871318b032", "tree": "2385b3ced34880def26d709bf38e53016481f26f", "parents": [ "850ac5ca638b298fbb7031c70d7758477e0c5227" ], "author": { "name": "Ricard Rosson", "email": "ricard@groundbits.com", "time": "Tue Aug 11 09:07:30 2026 +0100" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Thu Aug 13 09:54:26 2026 -0300" }, "message": "drivers/lcd: rename apa102.c/max7219.c to unique object names\n\ndrivers/ is built by a single flat Makefile: every per-directory Make.defs\nappends its sources to one CSRCS list and its directory to one VPATH, and the\nobjects all land in drivers/ named after the source basename. Two sources\nwith the same basename in different subdirectories therefore map to the same\nobject, and make resolves the prerequisite through VPATH, which is searched\nin the order drivers/Makefile includes the Make.defs files. lcd is included\nbefore leds, so drivers/lcd always wins.\n\nBoth apa102 and max7219 exist twice, once as an LCD front-end and once as an\nLED driver:\n\n drivers/lcd/apa102.c CONFIG_LCD_APA102 drivers/leds/apa102.c CONFIG_LEDS_APA102\n drivers/lcd/max7219.c CONFIG_LCD_MAX7219 drivers/leds/max7219.c CONFIG_LEDS_MAX7219\n\ndrivers/lcd/Make.defs puts lcd on the VPATH for the whole directory whenever\nCONFIG_LCD\u003dy, so selecting only the LED driver still builds apa102.o from\ndrivers/lcd/apa102.c and the selected LED driver is never compiled at all.\nBecause the LCD front-ends take their constants from\ninclude/nuttx/lcd/apa102.h and include/nuttx/lcd/max7219.h, which are behind\nCONFIG_LCD_APA102 / CONFIG_LCD_MAX7219, the substituted source does not even\ncompile. With CONFIG_LCD\u003dy + CONFIG_LEDS_APA102\u003dy and CONFIG_LCD_APA102\nunset:\n\n lcd/apa102.c:701:20: error: \u0027APA102_BLACK\u0027 undeclared (first use in this\n function); did you mean \u0027APA102_BPP\u0027?\n\nand correspondingly for CONFIG_LEDS_MAX7219 without CONFIG_LCD_MAX7219:\n\n lcd/max7219.c:773:20: error: \u0027MAX7219_BLACK\u0027 undeclared (first use in this\n function); did you mean \u0027MAX7219_BPP\u0027?\n\nSo neither LED driver can be built together with CONFIG_LCD, and there is no\ndiagnostic pointing at the real cause.\n\nGive the LCD front-ends distinct basenames. The LCD side is the adapted use\nof these parts (an LED matrix driven as a display), and drivers/lcd already\nnames such variants for their role, e.g. ht16k33_14seg.c, so the suffix goes\nthere and the LED drivers keep the plain part names. The CMake build derives\nobject paths from the source directory and was never affected; its source\nlists are updated to match.\n\nSigned-off-by: Ricard Rosson \u003cricard@groundbits.com\u003e\nAssisted-by: Claude Opus 5 (Claude Code)\n" }, { "commit": "850ac5ca638b298fbb7031c70d7758477e0c5227", "tree": "96dc2895d7d9fcdadbd3f7c2d9e7fc45e49afa2c", "parents": [ "ebb9d80befbf342859b1a6b712f667a3b8f87268" ], "author": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 13:34:41 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Thu Aug 13 08:55:56 2026 -0300" }, "message": "Documentation/hpm6360evk: improve readability\n\nseparate code sections for better readability\n\nSigned-off-by: Alin Jerpelea \u003calin.jerpelea@sony.com\u003e\n" }, { "commit": "ebb9d80befbf342859b1a6b712f667a3b8f87268", "tree": "e6101dd238c0c60ba386c7ebabe9234fc888f35a", "parents": [ "d4d4db5bb1229ec5fd34f2e7bd53ce6185a813ff" ], "author": { "name": "kay-lambdadelta", "email": "lambdadeltakay@proton.me", "time": "Mon Aug 10 17:49:11 2026 -0700" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 12:41:54 2026 +0200" }, "message": "tools/rust: Fix softfloat abi target spec name\n\nRename abi \"x86-softfloat\" to just \"softfloat\" to enable compatibility\nwith newer rust nightly versions.\n\nRust recently changed the name of the softfloat abi to one more unified\nacross targets, and more recently, removed the compat alias.\n\nSigned-off-by: Kay Lambdadelta \u003clambdadeltakay@proton.me\u003e\n" }, { "commit": "d4d4db5bb1229ec5fd34f2e7bd53ce6185a813ff", "tree": "af87f9bb62d829e76d9a6cf3aa37a1dcbf3874fb", "parents": [ "d2c91137e5f45d3fb7be6cc677c90696a391e0e6" ], "author": { "name": "zhangyu117", "email": "zhangyu117@xiaomi.com", "time": "Mon Aug 10 20:05:51 2026 +0800" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 12:38:45 2026 +0200" }, "message": "arch/tricore: perf.c donot depend on illd\n\nReplace the iLLD helpers IfxCpu_resetAndStartCounters() and\nIfxCpu_getClockCounter() in the performance-counter path with direct\nCSR accesses via tricore_mtcr()/tricore_mfcr().\n\ntricore_reset_ccnt() disables the CPU cycle counter (CPU_CCTRL), clears\nCPU_CCNT, then re-enables it; up_perf_gettime() reads CPU_CCNT directly.\nThis removes the arch/tricore perf path\u0027s dependency on the Infineon\niLLD layer. No behavior change.\n\nSigned-off-by: zhangyu117 \u003czhangyu117@xiaomi.com\u003e\n" }, { "commit": "d2c91137e5f45d3fb7be6cc677c90696a391e0e6", "tree": "9aba196d3658f15f9e83322bdfb5c8a405806739", "parents": [ "ffc9846a02312561271287085d6ed2bba944a553" ], "author": { "name": "zhangyu117", "email": "zhangyu117@xiaomi.com", "time": "Mon Aug 10 20:17:28 2026 +0800" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 12:38:45 2026 +0200" }, "message": "arch/tricore: cachecode donot depend on illd\n\nReplace the iLLD register structures (Ifx_CPU_PCON0/1/2, Ifx_CPU_DCON0/1/2)\nand the IfxCpu_cfg.h cache-size/line-size macros in the cache path with\ndirect CSR accesses via tricore_mtcr()/tricore_mfcr() and locally defined\nPCON/DCON bit masks. Also switch __isync()/__dsync() to the UP_ISB()/\nUP_DSB() barrier wrappers.\n\nThis removes the arch/tricore cache path\u0027s dependency on the Infineon\niLLD layer. No behavior change.\n\nSigned-off-by: zhangyu117 \u003czhangyu117@xiaomi.com\u003e\n" }, { "commit": "ffc9846a02312561271287085d6ed2bba944a553", "tree": "7636cd6d39e6628367d54b9e19df8df57009d6d4", "parents": [ "f8cf5f9d4e56e87d863f90a1c815387bbaee069a" ], "author": { "name": "zhangyu117", "email": "zhangyu117@xiaomi.com", "time": "Mon Aug 10 20:05:18 2026 +0800" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 12:38:45 2026 +0200" }, "message": "arch/tricore: add tricore_mtcr and tricore_mfcr macros\n\nAdd tricore_mtcr()/tricore_mfcr() inline-assembly wrappers for the\nMTCR/MFCR (move to/from Core Special Function Register) instructions.\nThese let arch/tricore code access CSRs directly without relying on the\nInfineon iLLD intrinsics, and are used by the following iLLD-removal\nchange in the performance-counter path.\n\nSigned-off-by: zhangyu117 \u003czhangyu117@xiaomi.com\u003e\n" }, { "commit": "f8cf5f9d4e56e87d863f90a1c815387bbaee069a", "tree": "2d01093febe9a67e82b54ac734efaf5fca380474", "parents": [ "2a777381d6159e606779b559d4243000f37d3ce3" ], "author": { "name": "Javier Alonso", "email": "javieralonso@geotab.com", "time": "Thu Aug 06 17:03:39 2026 +0200" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 12:29:11 2026 +0200" }, "message": "arch/s32k3xx: initializers clobbering rx_pin instead of enable_high\n\nThe `rx_pin` configuration when `CONFIG_S32K3XX_FLEXCAN2` is defined is\noverwritten if `PIN_CAN2_ENABLE` is defined, breaking the flexcan config\nfor S32K3 MCU.\n\nSigned-off-by: Javier Alonso \u003cjavieralonso@geotab.com\u003e\n" }, { "commit": "2a777381d6159e606779b559d4243000f37d3ce3", "tree": "a4fdf6e515e6f718f12dbb9d59cb5585d1cbaa44", "parents": [ "8730a75687cef0361c087acc45ab97c60c29a27c" ], "author": { "name": "Javier Alonso", "email": "javieralonso@geotab.com", "time": "Thu Aug 06 16:58:37 2026 +0200" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 12:29:11 2026 +0200" }, "message": "arch/kinetis: initializers clobbering rx_pin instead of enable_high\n\nThe `rx_pin` configuration when `CONFIG_KINETIS_FLEXCAN2` is defined is\noverwritten if `PIN_CAN2_ENABLE` is defined, breaking the flexcan config\nfor Kinetis MCU. Additionally, the `.enable_high` configuration points to\na non-defined constant/macro (looks like a legacy from the first driver\ndefinition). Based on regularly maintained drivers (such as s32k3), this\nwas changed to `CAN2_ENABLE_OUT`\n\nSigned-off-by: Javier Alonso \u003cjavieralonso@geotab.com\u003e\n" }, { "commit": "8730a75687cef0361c087acc45ab97c60c29a27c", "tree": "538772ff40c1e238bcc0d0998c5f83b7eb0a35d1", "parents": [ "bf45e12fdd7b1ac9e3cfdbbd4125e7ff3cdb0d37" ], "author": { "name": "Javier Alonso", "email": "javieralonso@geotab.com", "time": "Thu Aug 06 16:48:00 2026 +0200" }, "committer": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Thu Aug 13 12:29:11 2026 +0200" }, "message": "arch/s32k1xx: initializers clobbering rx_pin instead of enable_high\n\nThe `rx_pin` configuration when `CONFIG_S32K1XX_FLEXCAN2` is defined is\noverwritten if `PIN_CAN2_ENABLE` is defined, breaking the flexcan config\nfor S32K1 MCU. Additionally, the `.enable_high` configuration points to\na non-defined constant/macro (looks like a legacy from the first driver\ndefinition). Based on regularly maintained drivers (such as s32k3), this\nwas changed to `CAN2_ENABLE_OUT`\n\nSigned-off-by: Javier Alonso \u003cjavieralonso@geotab.com\u003e\n" }, { "commit": "bf45e12fdd7b1ac9e3cfdbbd4125e7ff3cdb0d37", "tree": "606739bae14666a2d92ec8e064f59833821aaa21", "parents": [ "3bc0b1790890d36304f12b0f196c0bdbd12af3b5" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Wed Aug 12 21:21:37 2026 +0200" }, "committer": { "name": "simbit18", "email": "101105604+simbit18@users.noreply.github.com", "time": "Thu Aug 13 07:54:00 2026 +0200" }, "message": "Revert \"cmake: normalize .config on reconfigure\"\n\nThis reverts commit 9b0d46c222907112e5127591e05cb1e39f7cb1de.\n\nThis change was made to fix a problem in NTFC with kernel build,\nbut it introduces an incompatibility with make.\n\nWe are reverting this change and the NTFC issue will be resolved\non the NTFC side.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\n" }, { "commit": "3bc0b1790890d36304f12b0f196c0bdbd12af3b5", "tree": "00db98f714d66b8a1d9bcf7abb0ea4bd50146369", "parents": [ "cf3781b7f0075d7e369ac27394ebbe11843b67ed" ], "author": { "name": "Abhishek Mishra", "email": "mishra.abhishek2808@gmail.com", "time": "Wed Aug 12 07:13:37 2026 +0000" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 16:06:03 2026 -0300" }, "message": "Documentation: document supplementary groups and setresuid/setresgid\n\nDocument CONFIG_SCHED_NGROUPS, setgroups/getgroups/initgroups, and\nsetresuid/setresgid in the user identity guide.\n\nSigned-off-by: Abhishek Mishra \u003cmishra.abhishek2808@gmail.com\u003e\n" }, { "commit": "cf3781b7f0075d7e369ac27394ebbe11843b67ed", "tree": "521bc1b55085a668a60e6f7b8ac87b437d4bb459", "parents": [ "1014c49881b880bcbc60c6f6443f05ff9e0736b9" ], "author": { "name": "Abhishek Mishra", "email": "mishra.abhishek2808@gmail.com", "time": "Wed Aug 12 07:13:36 2026 +0000" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 16:06:03 2026 -0300" }, "message": "sched: add setresuid and setresgid\n\nComplete the POSIX credential setters for real/effective/saved UID and\nGID so login and privilege-drop paths can clear saved-root without\nrelying on setreuid patterns alone.\n\nSigned-off-by: Abhishek Mishra \u003cmishra.abhishek2808@gmail.com\u003e\n" }, { "commit": "1014c49881b880bcbc60c6f6443f05ff9e0736b9", "tree": "ad4bd518d68865f9ed72662e1b798fa90aea7a98", "parents": [ "563857a4f8d66a047fe18b6d02542d29d9acaa76" ], "author": { "name": "Abhishek Mishra", "email": "mishra.abhishek2808@gmail.com", "time": "Wed Aug 12 07:13:36 2026 +0000" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 16:06:03 2026 -0300" }, "message": "sched: add supplementary group IDs (setgroups/getgroups/initgroups)\n\nTrack supplementary GIDs per task group, wire setgroups/getgroups\nsyscalls when CONFIG_SCHED_NGROUPS \u003e 0, and honor them in DAC checks\nvia nxsched_has_gid(). When NGROUPS is 0, libc provides getgroups/\nsetgroups stubs. initgroups() fails instead of silently truncating\nwhen membership exceeds CONFIG_SCHED_NGROUPS.\n\nSigned-off-by: Abhishek Mishra \u003cmishra.abhishek2808@gmail.com\u003e\n" }, { "commit": "563857a4f8d66a047fe18b6d02542d29d9acaa76", "tree": "4d663650c77e04d8f8eb367602fd3e0b57c2c963", "parents": [ "c9a27f00c677dfa8913827d6255b68f9d7527c67" ], "author": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Wed Aug 12 16:24:35 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Thu Aug 13 02:41:57 2026 +0800" }, "message": "boards/risc-v/hpm6360evk: build fix\n\nswitch to flash.script to avoid running out of storage\n\nbefore:\nRegister: hello\nRegister: nsh\nRegister: sh\nLD: nuttx\nriscv32-unknown-elf-ld: /nuttx/nuttx section .text will not fit in region ilm\nriscv32-unknown-elf-ld: region ilm overflowed by 904 bytes\nMemory region Used Size Region Size %age Used\n ilm: 131976 B 128 KB 100.69%\n dlm: 11360 B 128 KB 8.67%\n axi_sram: 0 GB 256 KB 0.00%\naxi_sram_noncacheable: 0 GB 256 KB 0.00%\n ahb_sram: 0 GB 32 KB 0.00%\nmake[1]: *** [Makefile:195: nuttx] Error 1\nmake: *** [tools/Unix.mk:569: nuttx] Error 2\n\nafter:\nRegister: hello\nRegister: sh\nRegister: nsh\nLD: nuttx\nMemory region Used Size Region Size %age Used\n flash: 145132 B 16 MB 0.87%\n ilm: 0 GB 128 KB 0.00%\n dlm: 11360 B 128 KB 8.67%\n axi_sram: 0 GB 256 KB 0.00%\naxi_sram_noncacheable: 0 GB 256 KB 0.00%\n ahb_sram: 0 GB 32 KB 0.00%\nCP: nuttx.hex\n\nSigned-off-by: Alin Jerpelea \u003calin.jerpelea@sony.com\u003e\n" }, { "commit": "c9a27f00c677dfa8913827d6255b68f9d7527c67", "tree": "7085c06c49e722d51f9c90266d8dfa05843d58dc", "parents": [ "17025085eadf33906ccb57ccbc95ba8b2c05b4ab" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 11:30:10 2026 -0300" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 14:08:34 2026 -0300" }, "message": "arch/sim: Fix #ifdef/#else on x11 event loop\n\nAs suggested by Xiang Xiao, let\u0027s fix the identation\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\n" }, { "commit": "17025085eadf33906ccb57ccbc95ba8b2c05b4ab", "tree": "d90fcb860adbb87e15466f9e04238b3c4061392e", "parents": [ "42ac826a4cc5805d91bfc86f2232fd79f9ef6ab6" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 10:44:07 2026 -0300" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 14:08:34 2026 -0300" }, "message": "arch/sim: Add support to emulated Mouse\n\nThis commit adds support for three buttons Mouse emulation on SIM.\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\nAssisted-by: Claude Code\n" }, { "commit": "42ac826a4cc5805d91bfc86f2232fd79f9ef6ab6", "tree": "c0fdd1f7e1de53c6e3dbb550039c7b2e6dca3db9", "parents": [ "e2ab02d368316c77b496fe7f21b29ed45f54b484" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 10:42:37 2026 -0300" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 14:08:34 2026 -0300" }, "message": "doc/sim: Add Documentation about SIM Input\n\nThis commit adds basic information about SIM Input support.\n\nSigned-off-by: Alan C. Assis \u003cacassis@gmail.com\u003e\n" }, { "commit": "e2ab02d368316c77b496fe7f21b29ed45f54b484", "tree": "7959e6500a7a91fa9d20254fc878a6b0d1a8dbc4", "parents": [ "a450392da554bf12d991bfef6ef30ec117a8a2a0" ], "author": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Wed Aug 12 16:45:39 2026 +0200" }, "committer": { "name": "CeDeROM", "email": "tomek@cedro.info", "time": "Wed Aug 12 17:14:11 2026 +0200" }, "message": "Documentation\\hpm6360evk: update guide to match the user experience\n\nupdated the cross-compiler download, added verification steps and rearanged the\nguide\n\nSigned-off-by: Alin Jerpelea \u003calin.jerpelea@sony.com\u003e\n" }, { "commit": "a450392da554bf12d991bfef6ef30ec117a8a2a0", "tree": "c35e429d6f5967ec4e693d421fe47f06ef6b0f13", "parents": [ "4977c28a3faf51319f5ed6cf073775c9a7111ef9" ], "author": { "name": "alexcekay", "email": "alexander@auterion.com", "time": "Wed Aug 12 11:49:14 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 12:12:46 2026 -0300" }, "message": "fs/cromfs: Fix stale cache read in read() fast path.\n\ncromfs_read()\u0027s fast path decompresses a block directly into the\ncaller\u0027s buffer whenever a read reaches a block at its start and the\ncaller has room for the whole decompressed block, bypassing the\nper-file decompression cache (ff_buffer). It nonetheless marked that\nblock as cached by setting ff_offset, without ever writing ff_buffer\nitself.\n\nA later read of the same block that fell onto the slow path trusted\nthat false cache tag, skipped decompression, and copied from\nff_buffer without it ever having been populated for that block. A\nrepeated identical fast-path read of the same block hit the same\nfalse tag and skipped decompression entirely, leaving the caller\u0027s\nbuffer untouched and returning whatever was already there.\n\nFixed by having the fast path only read the cache, never populate it:\nreuse ff_buffer when a prior slow-path read already cached the same\nblock, otherwise decompress straight into the caller\u0027s buffer without\ntouching ff_offset/ff_buffer.\n\nCo-authored-by: Pavlo\nAssisted-by: Claude Code:claude-sonnet-5\nSigned-off-by: alexcekay \u003calexander@auterion.com\u003e\n" }, { "commit": "4977c28a3faf51319f5ed6cf073775c9a7111ef9", "tree": "ca2bf2f3db6ed8465dbe0ecb40ad52445abc1d97", "parents": [ "8422531f931a4da17f2bb7cc457fe20cdac718bb" ], "author": { "name": "Alin Jerpelea", "email": "alin.jerpelea@sony.com", "time": "Wed Aug 12 14:40:21 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 21:53:28 2026 +0800" }, "message": "Documentation: add NuttX 13.0.1 release notes\n\nadd release notes for NuttX 13.0.1 release\n\nSigned-off-by: Alin Jerpelea \u003calin.jerpelea@sony.com\u003e\n" }, { "commit": "8422531f931a4da17f2bb7cc457fe20cdac718bb", "tree": "f5ce055a2e41dde23b6d33232680013349ea75dd", "parents": [ "0be19937ba1ca2cdd85d999f3fd3530080c1c810" ], "author": { "name": "zhanghongyu", "email": "zhanghongyu@xiaomi.com", "time": "Mon Jul 13 10:07:04 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 09:41:52 2026 -0300" }, "message": "net/udp: fix d_len corruption for 2nd+ SO_REUSEADDR listener\n\nIn udp_input()\u0027s broadcast/multicast fan-out loop, each iteration\ncalls netdev_iob_replace(dev, iob) to swap in a freshly cloned iob\nbefore handing the packet to the next matching connection. That\nfunction unconditionally sets dev-\u003ed_len \u003d iob-\u003eio_pktlen, which is\nthe full frame length (IP + UDP headers + payload), undoing the\n\u0027dev-\u003ed_len -\u003d udpiplen\u0027 done once before the loop to strip the\nheaders off for udp_input_conn().\n\nAs a result, every connection after the first sees a d_len that is\nudpiplen (IP+UDP header length, eg 28 bytes for IPv4) too large.\nThis value flows into udp_datahandler() as buflen (it reads\ndev-\u003ed_len directly) and is stored as the queued packet\u0027s declared\nlength in the connection\u0027s read-ahead iob chain. Once more than one\nsuch oversized entry has queued up in the same chain, the consumer\n(udp_readahead() in udp_recvfrom.c) parses the following entry\u0027s\nmetadata starting at the wrong offset, so whatever byte happens to\nland on src_addr_size is trusted as-is. That single byte (0-255) is\nthen used as the length in iob_copyout(srcaddr, iob, src_addr_size,\n...), which fills a fixed-size stack buffer with no bounds check\noutside a DEBUGASSERT - compiled out in release builds - so an\noversized value overflows that stack buffer.\n\nRe-apply the same \u0027-\u003d udpiplen\u0027 header-stripping after each\nnetdev_iob_replace() call in the loop, matching what\u0027s already done\nonce before the loop for the first connection.\n\nInside udp_input_conn, d_appdata is always set first, and since neither\nthe ICMP nor ICMPv6 process accesses d_appdata, the redundant d_appdata\nsettings have been removed.\n\nSigned-off-by: yi chen \u003c94xhn1@gmail.com\u003e\n" }, { "commit": "0be19937ba1ca2cdd85d999f3fd3530080c1c810", "tree": "f1b218bb139f47587e90424a4ef4477dd45bae0c", "parents": [ "af49db4483bf8f423b444a3b10aef690427d088d" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Wed Aug 12 15:19:22 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 08:46:16 2026 -0300" }, "message": "Documentation/rtl8721dx,rtl8721f: document the I2C driver\n\nThe I2C master driver support for the RTL8721Dx (pke8721daf) and RTL8721F\n(rtl8721f_evb) boards was merged without the matching board documentation.\nAdd the missing I2C entry to each board\u0027s Features list and an \"i2c\"\nconfiguration section describing the /dev/i2cN devices, the board pin\ntable, and the i2ctool usage, mirroring the existing gpio/uart sections.\n\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "af49db4483bf8f423b444a3b10aef690427d088d", "tree": "e6a9f68e964db6fa773df360939a7f0253ce6737", "parents": [ "18d2ae253c121f714d23cee5ef7de1caad3759d5" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Wed Aug 12 14:41:03 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 08:46:16 2026 -0300" }, "message": "arch/arm/rtl8720f: add I2C master driver support\n\nWire the RTL8720F to the shared Ameba I2C master driver\n(arch/arm/src/common/ameba/ameba_i2c.c), reusing it unchanged.\n\nAdd the per-chip header arch/arm/src/rtl8720f/ameba_i2c_chip.h supplying\nthe chip\u0027s I2C wiring: two controllers (I2C0/I2C1) on their non-secure\nregister aliases (0x401c8000 / 0x401c9000), the APBPeriph function/clock\nmasks, the crossbar SCL/SDA pad-mux codes (59/60 and 61/62), and\nAMEBA_I2C_HAS_DMA_FIELDS\u003d1 (the chip\u0027s I2C_InitTypeDef carries the DMA\nrequest-level fields).\n\nAdd the board glue: rtl8720f_i2c.c registers I2C0 at /dev/i2c0\n(PA22/PA23) and I2C1 at /dev/i2c1 (PA24/PA25), plus the build wiring\n(Make.defs / CMakeLists.txt / ameba_board.mk pull in the common driver\nand the fwlib ram_common/ameba_i2c.c data-table source), the bringup\nregistration hook and the board header declaration.\n\nAdd the i2c defconfig (minimal NSH with the i2ctool) and document the\nconfig in the board index.\n\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "18d2ae253c121f714d23cee5ef7de1caad3759d5", "tree": "bdfbbc9ebcee3eee678b9eaac7fd544592e55e7a", "parents": [ "3197472ad42c1b156ceb531450850d81a66e1ff9" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Wed Aug 12 13:55:09 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 08:46:16 2026 -0300" }, "message": "arch/arm/rtl8720f: add UART master driver support\n\nWire the shared common UART driver\n(arch/arm/src/common/ameba/ameba_uart.c) into RTL8720F. Add an\nameba_uart_chip.h supplying the per-chip UART parameters: two\ngeneral-purpose controllers (UART0/UART1), their non-secure register\nbases (0x401C3000 / 0x401C4000 -- the fwlib UART_DEV_TABLE points at\nthe non-secure alias), NVIC vectors, APBPeriph function/clock masks\nand the crossbar TX/RX pad-mux function codes.\n\nThe fwlib ROM UART routines index data tables (UART_DEV_TABLE,\nAPBPeriph_UARTx) that live in fwlib ram_common/ameba_uart.c, so that\nsource is compiled in when CONFIG_AMEBA_UART is set. Wire\nCONFIG_AMEBA_UART into Make.defs/CMakeLists/ameba_board.mk, add the\nboard port table (UART0 at /dev/ttyS1, PA22 TX / PA23 RX, 115200 8N1)\nwith bringup registration, a uart config and board documentation.\n\nHardware-verified on rtl8720f_evb: serialrx/serialblaster over a\nPA22-to-PA23 TX/RX loopback transferred all 2600 bytes intact.\n\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\n" }, { "commit": "3197472ad42c1b156ceb531450850d81a66e1ff9", "tree": "0bc407f10d48123ba8f3bf07639f8f57850bba0f", "parents": [ "62b41ad9b40d5a513486a3b7f9be86ed8cdfe0e5" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Tue Aug 11 13:44:15 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Wed Aug 12 08:46:16 2026 -0300" }, "message": "arch/arm/rtl8720f: add single-port GPIO support\n\nRTL8720F drives all GPIO through a single 32-pin port A controller\nserved by one NVIC vector, unlike RTL8721Dx (ports A/B) or RTL8721F\n(ports A/B/C). Add an ameba_gpio_chip.h that configures the shared\ncommon GPIO driver (arch/arm/src/common/ameba/ameba_gpio.c) for a\nsingle port: AMEBA_GPIO_NPORTS\u003d1, AMEBA_GPIO_PORT_IRQS\u003d{GPIOA} and\nthe APBPeriph_GPIO gate bits.\n\nGPIO_INTStatusGet/ClearEdge live in the RTL8720F ROM symbol table, so\nno fwlib ram_common object needs compiling in. Wire CONFIG_AMEBA_GPIO\ninto Make.defs/CMakeLists/Kconfig, add the board pin table (PA22 out,\nPA23 in, PA24 interrupt) with bringup registration and a gpio config.\n\nHardware-verified on rtl8720f_evb: output, input and (falling-edge)\ninterrupt all confirmed via a PA22-to-PA24 loopback.\n\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "62b41ad9b40d5a513486a3b7f9be86ed8cdfe0e5", "tree": "fa45e16b6bba6d37c794713521e534aca1927abd", "parents": [ "9b0d46c222907112e5127591e05cb1e39f7cb1de" ], "author": { "name": "Luka Filipović", "email": "filipovicluka3@gmail.com", "time": "Mon Aug 10 20:47:00 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 15:41:32 2026 +0800" }, "message": "arch/arm/src/common/stm32: Bound SDIO command response wait by time.\n\nstm32_waitresponse() polls SDIO_STA bounded only by an iteration\ncounter, set to 0x7fffffff for all R1/R1B/R2/R4/R5/R6 commands. The\nhardware CTIMEOUT flag is the intended exit for a missing response,\nbut it is only generated while the card clock is running and the CPSM\nhas reached its Wait state. If the card clock stops or the peripheral\nfails, SDIO_STA never updates and the loop spins for INT32_MAX\niterations while holding the FAT filesystem lock, at the caller\u0027s\npriority-inheritance boosted priority if higher priority tasks block\non the filesystem. Since the mmcsd layer retries failed commands,\nthe driver\u0027s recovery paths are never reached and the system never\nrecovers.\n\nBound the wait by time instead: 250 ms for response-bearing commands\n(the largest timeout the SD specification allows for any operation)\nand 10 ms for the no-response/R3/R7 cases. CTIMEOUT remains the\nnormal error exit within microseconds; the software bound only fires\nwhen the peripheral itself is dead, converting an unbounded spin into\n-ETIMEDOUT so the existing mmcsd retry logic can run.\n\nSigned-off-by: Luka Filipović \u003cfilipovicluka3@gmail.com\u003e\nAssisted-by: Claude Code:claude-fable-5\n" }, { "commit": "9b0d46c222907112e5127591e05cb1e39f7cb1de", "tree": "78b89c0095e5bc953ebac7bedbdabe963c949dc9", "parents": [ "30cbb23e6bbc7768cd5898392549210fa58c57c8" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Tue Aug 04 21:37:03 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 14:38:44 2026 +0800" }, "message": "cmake: normalize .config on reconfigure\n\nolddefconfig only ran when .config was generated from the defconfig,\nso changes applied to an existing .config (e.g. with kconfig-tweak)\nnever got their dependent defaults. Run olddefconfig on reconfigure as\nwell, as the Make flow does on every build.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\nAssisted-by: Claude Code\n" }, { "commit": "30cbb23e6bbc7768cd5898392549210fa58c57c8", "tree": "2ea291f10cc91cd41a19acc2434ca4a9572a74a1", "parents": [ "dfc55c9bbee7b3f677c30763702623fa72f34ea2" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Tue Aug 11 09:42:32 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 14:22:00 2026 +0800" }, "message": "arch/arm/rtl8721f: add I2C master driver support\n\nWire the shared Ameba I2C master lower-half (arch/arm/src/common/\nameba/ameba_i2c.c) into the RTL8721F (amebagreen2) build through a\nper-chip header (ameba_i2c_chip.h), and register the RTL8721F EVB\nbuses at /dev/i2cN.\n\nPer-chip differences from the other Ameba SoCs (non-secure register\nbases, crossbar pinmux codes, APB clock masks and the fwlib\nI2C_InitTypeDef layout) are isolated in ameba_i2c_chip.h; no change to\nthe shared driver is needed.\n\nVerified end-to-end on hardware against a second Ameba board acting\nas an I2C slave: address ACK, register write and read-back over\nrepeated-START, and bus scan all pass on I2C0 (PA22/PA23).\n\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\n" }, { "commit": "dfc55c9bbee7b3f677c30763702623fa72f34ea2", "tree": "955e03c4edfcd04ee0036f2523f8a38fc399997f", "parents": [ "9b02dead5dac925c51b7a7b2e34922418f884f03" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Fri Jul 17 10:10:18 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 14:22:00 2026 +0800" }, "message": "arch/arm/rtl8721dx: add shared Ameba I2C driver\n\nAdd a shared NuttX I2C master lower-half for the Realtek Ameba I2C\ncontrollers (I2C0/I2C1) in arch/arm/src/common/ameba, driven through\nthe SDK fwlib in polling mode. Per-chip wiring (controller count,\nregister bases, clock masks, crossbar pad-mux codes and the fwlib\nI2C_InitTypeDef layout) lives in arch/arm/src/rtl8721dx/ameba_i2c_chip.h\nso a port to the other Ameba chips only supplies a same-named header.\n\nEach controller registers as /dev/i2cN from pke8721daf bring-up through\nthe stock I2C character driver; a dedicated `i2c` defconfig drives the\ni2ctool for validation.\n\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\n" }, { "commit": "9b02dead5dac925c51b7a7b2e34922418f884f03", "tree": "6056b9ffad65955e8861f9f4a4eac6a4c4aa380a", "parents": [ "a0fcbb7957e916d03e346de9bdf5d1be2dd4ccd0" ], "author": { "name": "Ricard Rosson", "email": "ricard@groundbits.com", "time": "Tue Aug 11 09:29:23 2026 +0100" }, "committer": { "name": "simbit18", "email": "101105604+simbit18@users.noreply.github.com", "time": "Wed Aug 12 08:16:52 2026 +0200" }, "message": "boards/esp32s3-ws-lcd128: use esp_hr_timer_init(), fix Wi-Fi build\n\nesp32s3_bringup.c still guards on CONFIG_ESP32S3_RT_TIMER, includes\n\"esp32s3_rt_timer.h\" and calls esp32s3_rt_timer_init(). None of those\nexist any more: c17e16eaed (\"xtensa/espressif: Update common-source\nintegration for Xtensa devices\") deleted the chip-specific RT timer and\nreplaced it with the common-source HR Timer, and updated every other\nesp32s3 board\u0027s bringup to CONFIG_ESPRESSIF_HR_TIMER /\n\"espressif/esp_hr_timer.h\" / esp_hr_timer_init(). This board was missed.\n\nThe stale guard is not dead code: ESPRESSIF_WIRELESS selects\nESP32S3_RT_TIMER (which survives only as a deprecated alias that selects\nESPRESSIF_HR_TIMER), so enabling Wi-Fi on this board turns the guard on and\nthe build fails outright:\n\n board/esp32s3_bringup.c:61:12: fatal error: esp32s3_rt_timer.h:\n No such file or directory\n\nNo esp32s3-ws-lcd128 defconfig enables Wi-Fi, which is why CI has not\ncaught it.\n\nSwitch to the same guard, include and initializer the other esp32s3 boards\nuse. No functional change for the existing defconfigs: they leave both\nESP32S3_RT_TIMER and ESPRESSIF_HR_TIMER unset, so the block stays compiled\nout.\n\nVerified with esp32s3-ws-lcd128:nsh plus CONFIG_ESPRESSIF_WIFI\u003dy (and the\nWi-Fi prerequisites the in-tree wifi defconfigs set: SCHED_LPWORK,\nDRIVERS_WIRELESS/DRIVERS_IEEE80211, NETDEV_WIRELESS_IOCTL, IOB_NCHAINS,\nTLS_TASK_NELEM, TIMER): the fatal error above before the change, a clean\nbuild and image after it, with no other change to the configuration.\n\nSigned-off-by: Ricard Rosson \u003cricard@groundbits.com\u003e\nAssisted-by: Claude Opus 5 (Claude Code)\n" }, { "commit": "a0fcbb7957e916d03e346de9bdf5d1be2dd4ccd0", "tree": "78838717c6119a87b2f79a834fffbe745e0e06c1", "parents": [ "931d5f50d446ae0f5c66ee783a232192af3bcfbc" ], "author": { "name": "ganjing", "email": "ganjing@xiaomi.com", "time": "Tue Aug 11 11:59:21 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 10:24:01 2026 +0800" }, "message": "libs/libc/risc-v: Refresh memcpy and memset with XLEN-adaptive loops.\n\nRewrite arch_memcpy.S and arch_memset.S to be register-width aware on\nboth RV32 and RV64 using REG_L/REG_S/SZREG macros from asm.h.\n\nmemcpy gains:\n - 16xSZREG unrolled main loop (128B/iter on RV64, 64B on RV32).\n - Shift-merge path for misaligned src: reads two aligned words\n straddling each output word and shifts them together, so no load\n or store is ever misaligned.\n - Single SZREG and byte loops for remainder and small copies.\n\nmemset gains:\n - 32xSZREG unrolled main loop (256B/iter on RV64, 128B on RV32)\n using Duff\u0027s device for non-power-of-two remainders.\n - .option norvc ensures fixed 4-byte instruction width for correct\n jump offset calculation in the Duff\u0027s device entry.\n - Zero-length input handled correctly (branch to guarded tail).\n\nThe old memcpy always used lw/sw even on RV64, wasting half the\nmemory bandwidth. The old memset unrolled only 16 bytes per iteration.\n\nSigned-off-by: ganjing \u003cganjing@xiaomi.com\u003e\n" }, { "commit": "931d5f50d446ae0f5c66ee783a232192af3bcfbc", "tree": "d50922204a9ff67ba2b1f30b32f6601c296bc39a", "parents": [ "ad9c9d41b09e02d87585406c7ee27eb0748d2195" ], "author": { "name": "ganjing", "email": "ganjing@xiaomi.com", "time": "Tue Aug 11 14:22:35 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 10:23:47 2026 +0800" }, "message": "libs/libc/risc-v: Add optimized strlcpy.\n\nAdd word-at-a-time strlcpy using DETECTNULL for both the copy phase\nand the strlen tail when truncated. The copy loop aligns src and\nprocesses a register at a time, falling to bytewise for the last word\ncontaining the terminator. When truncated, the remaining src length\nis measured with a second word-at-a-time loop.\n\nstrlcpy has 46 call sites in a typical kernel image (more than strcpy)\nand is not covered by newlib OPTSPEED, making it a high-value target.\n\nAssisted-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nSigned-off-by: ganjing \u003cganjing@xiaomi.com\u003e\n" }, { "commit": "ad9c9d41b09e02d87585406c7ee27eb0748d2195", "tree": "b544387165dc6954b9564380b597bf7564d15b35", "parents": [ "9b20c629fe020775c9b0e1249904fb6695ca9447" ], "author": { "name": "ganjing", "email": "ganjing@xiaomi.com", "time": "Tue Aug 11 14:22:20 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 10:23:47 2026 +0800" }, "message": "libs/libc/risc-v: Unroll memcmp with 4-word XOR|OR folding.\n\nReduce branch overhead in the memcmp main loop by comparing four\nwords per iteration: XOR each pair, OR the four differences together,\nand branch once. On a mismatch the single-word loop locates the\nexact differing word within four words of the fault.\n\nAdd a beqz guard at .Lbyte_cmp entry to handle the case where the\n4-word loop consumes all remaining bytes exactly.\n\nMeasured on QEMU RV32: memcmp(128) 313 -\u003e 271 cycles (13% faster).\n\nAssisted-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nSigned-off-by: ganjing \u003cganjing@xiaomi.com\u003e\n" }, { "commit": "9b20c629fe020775c9b0e1249904fb6695ca9447", "tree": "378e684c38061775a31125e46a2c096f924f7549", "parents": [ "5dafb683e412ce23a64284fe743931767f617a7f" ], "author": { "name": "ganjing", "email": "ganjing@xiaomi.com", "time": "Tue Aug 11 12:23:53 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 10:23:47 2026 +0800" }, "message": "libs/libc/risc-v: Add optimized string and memory functions.\n\nAdd assembly-optimized implementations for 14 string/memory functions\nusing word-at-a-time techniques (DETECTNULL, broadcast+XOR) and\nXLEN-adaptive macros for both RV32 and RV64:\n\n - memmove: direction check + forward tail to memcpy, reverse path\n with 16xSZREG unroll and shift-merge for misaligned src.\n - memcmp: word-granularity compare when both pointers share alignment,\n bytewise fallback for mismatched pointers.\n - memchr: broadcast target byte, XOR with each word, DETECTNULL to\n find matches. Counter-based bounds (no pointer overflow).\n - strlen: DETECTNULL word loop, constants loaded from .srodata.\n - strnlen: strlen with counter-based length limit.\n - strcpy/strncpy: word loop with DETECTNULL, zero-fill remainder\n for strncpy. strncpy reuses strcpy via #define USE_AS_STRNCPY.\n - stpcpy/stpncpy: reuse strcpy/strncpy via #define USE_AS_STPCPY.\n - strchr/strchrnul: broadcast+XOR detecting both target char and\n null simultaneously. strchrnul reuses strchr via #define.\n - strrchr: forward scan recording last match position.\n - strncmp: word-at-a-time compare with null detection and counter.\n - strcat: strlen(dst) then strcpy(dst_end, src) word-at-a-time.\n\nEach function is independently selectable via CONFIG_RISCV_\u003cFUNC\u003e,\nor all enabled together with CONFIG_RISCV_STRING_FUNCTION\u003dy.\n\nAssisted-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nSigned-off-by: ganjing \u003cganjing@xiaomi.com\u003e\n" }, { "commit": "5dafb683e412ce23a64284fe743931767f617a7f", "tree": "3b463318069e7ff4dc20d4f228173c7b691610e0", "parents": [ "46528ea5eee5f498fecb20ac94c1f166b204f281" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Tue Aug 11 11:13:02 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Wed Aug 12 00:37:18 2026 +0800" }, "message": "xtensa/esp32: Let a protected build boot from simple boot.\n\nA protected build on the ESP32 could only use the legacy IDF image format.\nKconfig allowed simple boot to be selected with BUILD_PROTECTED, because the\nlegacy format is only a default and not a select, but the result did not link\nand then did not boot.\n\nSimple boot has no second-stage bootloader. __start() maps the flash itself,\nso everything it reaches must already be in RAM. kernel-space.ld pinned none\nof it, and it did not place esp32_start at all, so the entry point went to the\nflash the code was about to map. The chip loaded the RAM segments, jumped to\n0x400d0ba4 and took an IllegalInstruction on the first instruction.\n\nSo this pins the bootloader, flash, ROM, clock and log objects that\nbootloader_init() and map_rom_segments() reach, along with esp32_start itself,\nand defines the six _image_* symbols that __start() needs. All of it is\nbehind CONFIG_ESPRESSIF_SIMPLE_BOOT, so a legacy build gets the same IRAM it\nhad before.\n\nkernel-space.ld also had no `#include \u003cnuttx/config.h\u003e\u0027. It held no\nconditionals until now, so nothing showed the omission: the new blocks\ncompiled away silently and the link failed as if the file had not been\nchanged.\n\nThe default is unchanged. A protected build still selects the legacy format\nunless the user clears CONFIG_ESP32_APP_FORMAT_LEGACY.\n\nVerified on an ESP32-DevKitC V4, ESP32-D0WD-V3 revision 3.1, with\nesp32-devkitc:knsh and the legacy format turned off. The kernel flashes at\n0x1000 and the user image at 0x90000, with no bootloader and no partition\ntable. It maps seven segments, reaches NSH, and runs ostest to the same point\nas the legacy build.\n\nAssisted-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "46528ea5eee5f498fecb20ac94c1f166b204f281", "tree": "8c7f41660c28ebb99345fa9c9da7ce75f32a1bfa", "parents": [ "83e4b6065add902305896b449272664634ae6ba9" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Mon Aug 10 11:56:16 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 23:49:21 2026 +0800" }, "message": "xtensa/esp32s3: Let a protected build boot from simple boot.\n\nBUILD_PROTECTED defaults ESP32S3_APP_FORMAT_LEGACY to y, so a protected build\nhas always needed the ESP-IDF second-stage bootloader. Nothing about the\nprotected layout requires it: the kernel and user images are described\nentirely by ESP32S3_KERNEL_OFFSET, ESP32S3_KERNEL_IMAGE_SIZE and\nESP32S3_KERNEL_RAM_SIZE, and esp32s3_userspace() maps the user image itself.\nThree obstacles stood in the way.\n\nThose three symbols were gated on ESP32S3_APP_FORMAT_LEGACY, but\nprotected_memory.ld needs all of them for KIROM, KDROM, UIROM, UDROM, KDRAM\nand UDRAM. Without them the region lengths underflow to 2**64-1 and the\nkernel/user RAM split lands nowhere, which the hardware reports as a DRAM0\nPMS monitor violation once the first user process runs. The offset becomes\n0x0 for simple boot, where the image is flashed at the start of the device.\n\nprotected_memory.ld had no case for a 32 MB part, so FLASH_SIZE was\nundefined there and ROM, UIROM and UDROM underflowed the same way.\nflat_memory.ld has had the case all along.\n\nkernel-space.ld defined none of the symbols simple boot needs\n(_image_irom_*, _image_drom_*, _bss_*), and kept none of the early code\nresident. __start() runs bootloader_init() and map_rom_segments() before any\nflash mapping exists, so everything they reach has to be in RAM -- including\nmap_rom_segments() itself, which unmaps the MMU it is running from, and\nnuttx_enter_critical(), reached from rtc_clk_init() by way of regi2c. These\nmirror what esp32s3_sections.ld already does for the flat build.\n\nVerified on an ESP32-S3-WROOM-2 (32 MB octal flash), esp32s3-devkit:knsh with\nFLASH_MODE_OCT: boots to NSH and runs ostest, where it reaches the same\ntimedmutex abort as every other target. The legacy path is untouched.\n\nAssisted-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "83e4b6065add902305896b449272664634ae6ba9", "tree": "da338a76be2a63c83211263b397416a373945914", "parents": [ "481d1697a8dd7afd734392a3f6c111c9ca8acac9" ], "author": { "name": "guanyi", "email": "guanyi@xiaomi.com", "time": "Tue Aug 11 16:42:03 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Tue Aug 11 12:40:27 2026 -0300" }, "message": "drivers/devfreq: add missing governor_data field and ondemand declaration\n\nThe ondemand governor (devfreq_ondemand.c) references dev-\u003egovernor_data\nto store its private state, and defines devfreq_ondemand(), but neither\nthe field in struct devfreq_s nor the function declaration were present\nin include/nuttx/devfreq.h. As a result, building with\nCONFIG_DEVFREQ_GOV_ONDEMAND\u003dy failed to compile.\n\nThese two definitions were originally introduced by a downstream commit\nthat was not part of the devfreq upstreaming series, so the gap only\nsurfaced when the ondemand governor is enabled (which additionally\nrequires !CONFIG_SCHED_CPULOAD_NONE and is off by default).\n\nAdd the governor_data field to struct devfreq_s and declare\ndevfreq_ondemand() alongside the other governors.\n\nSigned-off-by: guanyi \u003cguanyi@xiaomi.com\u003e\n" }, { "commit": "481d1697a8dd7afd734392a3f6c111c9ca8acac9", "tree": "c15589edd58b5c6950ce570ad5ef3881a74587e7", "parents": [ "2c79c9951b2d6c90d33f2f1d4e896f3fd2f87ff9" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Mon Aug 10 15:58:58 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 22:06:32 2026 +0800" }, "message": "arch/x86_64: align the user signal frame and skip the ABI red zone\n\nThe signal frame was built inside the 128 byte red zone of the\ninterrupted user code and inherited its stack alignment, so a leaf\nfunction could lose live data to the siginfo copy and the handler\ncould fault on an SSE access. Build the frame below the red zone,\n16 byte aligned; the naked trampoline calls the handler itself and\nits call provides the return address slot.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\nAssisted-by: Claude Code\n" }, { "commit": "2c79c9951b2d6c90d33f2f1d4e896f3fd2f87ff9", "tree": "09e1ce6bef198c3ec0978b400a5f5ce824d9b480", "parents": [ "4405b121558b5e3660d87ca53d7a379f1aa3345c" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Mon Aug 10 12:35:23 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 22:06:32 2026 +0800" }, "message": "arch/x86_64: run the signal trampoline on the thread kernel stack\n\nFor a thread interrupted in user mode the trampoline ran on the user\nstack, where the signal handler then grows over its frame. Run it on\nthe thread kernel stack, unused while the thread is in user mode. The\nstack cannot be selected from the saved CS: up_initial_state() records\nthe caller CS, a kernel selector even for user threads.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\nAssisted-by: Claude Code\n" }, { "commit": "4405b121558b5e3660d87ca53d7a379f1aa3345c", "tree": "5bf139edfd7bfaf68b6cdc0a2c3ed499d03e7dc7", "parents": [ "3d30272ce7f88fb9545dead669717901cf22bf8e" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Mon Aug 10 12:19:27 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 22:06:32 2026 +0800" }, "message": "arch/x86_64: restore the kernel stack when a signal handler returns\n\nSYS_signal_handler_return restored RSP from saved_rsp, which is not\nwritten when a task signals itself: synchronous dispatch skips\nup_schedule_sigaction(), so the kernel stack pointer was set to zero\nand the next push faulted. Save the kernel stack pointer at dispatch\nin xcp.kstkptr, as risc-v does, and restore that.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\nAssisted-by: Claude Code\n" }, { "commit": "3d30272ce7f88fb9545dead669717901cf22bf8e", "tree": "0e90f5c4b07647bddf518c46827d85de06da692d", "parents": [ "23ea1503a19118bd8d2b80a3579f0c3bc579ab86" ], "author": { "name": "Ricard Rosson", "email": "ricard@groundbits.com", "time": "Tue Aug 11 09:17:59 2026 +0100" }, "committer": { "name": "Filipe do Ó Cavalcanti", "email": "filipedoocv@gmail.com", "time": "Tue Aug 11 10:43:39 2026 -0300" }, "message": "arch/xtensa/espressif: initialize the HR Timer from the Wi-Fi init path\n\nThe Espressif Wi-Fi stack cannot work unless the esp_timer subsystem has\nbeen initialized, but nothing in the Wi-Fi code does that: it is left to\neach board\u0027s bringup to call esp_hr_timer_init() first. Any board that\ndoes not happen to make that call dies on the first RF enable.\n\nThe dependency is not visible from the Wi-Fi sources. The path is:\n\n board_wlan_init() -\u003e esp_wlan_sta_initialize() -\u003e esp_wlan_initialize()\n -\u003e esp_wifi_initialize() -\u003e esp_wifi_api_adapter_init()\n\nand later, when the radio is first powered up:\n\n esp_phy_enable_wrapper() -\u003e esp_phy_enable() (esp-hal-3rdparty,\n components/esp_phy/src/phy_init.c) -\u003e phy_track_pll_init()\n (components/esp_phy/src/phy_common.c)\n\nphy_track_pll_init() calls esp_timer_create() and\nesp_timer_start_periodic() wrapped in ESP_ERROR_CHECK(). Both return\nESP_ERR_INVALID_STATE while esp_timer is uninitialized, because the HAL\u0027s\nown esp_timer_init_os() startup hook is compiled out on NuttX\n(#ifndef __NuttX__ in components/esp_timer/src/esp_timer.c), so the timer\ntask and the timer ISR only ever get created from NuttX\u0027s\nesp_hr_timer_init() -\u003e esp_timer_init().\n\nInitialize the HR Timer at the top of esp_wifi_api_adapter_init(), where\nthe requirement actually originates. esp_hr_timer_init() is idempotent\n(it early-returns once the subsystem is up), so boards that already call\nit during bringup are unaffected. Also make ESPRESSIF_WIRELESS select\nESPRESSIF_HR_TIMER explicitly instead of inheriting it through the\ndeprecated ESP32{,S2,S3}_RT_TIMER symbols, so the timer adapter is\nguaranteed to be built whenever the radio is.\n\nThis is deliberately limited to Xtensa. The RISC-V common-espressif tree\nhas the same unenforced dependency, but nothing is broken there today: its\nESPRESSIF_WIRELESS already selects both ESPRESSIF_HR_TIMER and RTC_DRIVER,\nand esp_rtc.c initializes the timer. The mirror change can follow from\nsomeone able to test it on RISC-V hardware.\n\nThis was diagnosed on an out-of-tree ESP32-S3 board whose bringup lacked\nthe call. The failure gives no panic output at all and looks exactly like\na CPU lockup: the system tick stops, the console dies mid-line and USB\nstays enumerated but unresponsive. It was tracked down with ROM-level\nets_printf() breadcrumbs along the init path plus a high-priority thread\nthat busy-waits on ets_delay_us(): the breadcrumb trail ends inside\nphy_track_pll_init() and never reaches the print after it, and the\nbusy-wait thread keeps printing while every sleep()-based thread stops\nwaking, showing the tick is gone. Initializing the timer ahead of Wi-Fi\ninit makes the same image associate to an AP, obtain a DHCP lease and\nserve telnet. Validated on ESP32-S3 silicon (240 MHz, no PSRAM, 16 MiB\nflash).\n\nesp32s3-devkit:wifi builds clean with the change.\n\nSigned-off-by: Ricard Rosson \u003cricard@groundbits.com\u003e\nAssisted-by: Claude Opus 5 (Claude Code)\n" }, { "commit": "23ea1503a19118bd8d2b80a3579f0c3bc579ab86", "tree": "1d1359a82d38219debf40581840788e30b4a065f", "parents": [ "8f69f27b4dff01501080b3f3273e153db67f347c" ], "author": { "name": "22078360", "email": "wangtao.ref@haier.com", "time": "Tue Aug 11 15:18:28 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Tue Aug 11 09:53:38 2026 -0300" }, "message": "mips/Makefile: Add nuttx build with CONFIG_ALLSYMS enabled.\n\nChange the arch/mips/src/Makefile to build nuttx with CONFIG_ALLSYMS\nenabled in MIPS architecture. This enables symbol name showing in\nsystem, such as \u0027dumpstack 3\u0027 shows both functions name and addresses.\n\nThis change is referred to arch/tricore/src/Makefile and updated to\nwork well with MIPS. And it works with and without CONFIG_ALLSYMS enabled.\n\nFixes apache#19728\n\nSigned-off-by: wangtao \u003ctwangpicasso@gmail.com\u003e\n" }, { "commit": "8f69f27b4dff01501080b3f3273e153db67f347c", "tree": "53ae5e42a1e7db8d6323363733a21ac8b737fc52", "parents": [ "30a37690576456ebf5b94d3aa4efe1a6838c2705" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Tue Aug 11 11:37:15 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Tue Aug 11 09:52:16 2026 -0300" }, "message": "boards/esp32-devkitc: Let ostest finish on the knsh configuration.\n\nA full ostest run never reached the end on esp32-devkitc:knsh. It stopped in\nthe barrier test:\n\n barrier_test: ERROR thread 6 create, status\u003d12\n ostest_main: Exiting with status 256\n\nThe cause is the interaction of two settings that are each reasonable on their\nown. CONFIG_TLS_ALIGNED is set and CONFIG_TLS_LOG2_MAXSTACK is 13, so every\npthread stack must start on an 8 KiB boundary. The barrier threads take the\n2 KiB default stack, so each one occupies an 8 KiB aligned slot. Eight of them\ndo not fit the 96 KiB user heap of a protected build once the tests before them\nhave fragmented it, and up_create_stack() fails:\n\n up_create_stack: ERROR: Failed to allocate stack, size 2048\n\nThe flat build has the same two settings and passes, because its heap is\n320 KiB against 96 KiB here.\n\nSo this lowers the barrier thread count for this configuration only. Four\nthreads still test a barrier, and they leave margin: six was the most that\never started, so six would pass with none.\n\nThe user heap cannot grow far. User data has to sit in the MMU governed window\nof SRAM2, which is 128 KiB in total, and the kernel holds the first 32 KiB of\nit.\n\nVerified on an ESP32-DevKitC V4, ESP32-D0WD-V3 revision 3.1. All four threads\nreach the barrier and ostest reports \"Exiting with status 0\".\n\nAssisted-by: Claude Opus 5 (1M context) \u003cnoreply@anthropic.com\u003e\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "30a37690576456ebf5b94d3aa4efe1a6838c2705", "tree": "61be07b2c5afa04d990c67561739e108e986cfe1", "parents": [ "2567b729cf83f46f3ca1807fa09323dd49908e15" ], "author": { "name": "Lwazi Dube", "email": "lwazeh@gmail.com", "time": "Mon Aug 10 18:29:01 2026 -0400" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Tue Aug 11 09:46:46 2026 -0300" }, "message": "arch/mips: Add support for loadable ELF modules\n\nImplement architecture-specific ELF header definitions and relocation handling\nfor the MIPS architecture to enable loadable modules.\n\nFixes #19178.\n\nChanges include:\n- Add `arch/mips/include/elf.h` with MIPS ELF relocation types and\n architecture-specific ELF data structures (`arch_elfdata_s`).\n- Implement `libs/libc/machine/mips/arch_elf.c` containing `up_checkarch`,\n `up_relocate`, and `up_relocateadd` functions handling `R_MIPS_NONE`,\n `R_MIPS_32`, `R_MIPS_26`, `R_MIPS_HI16`, and `R_MIPS_LO16` relocations.\n- Integrate MIPS machine-specific C library support in\n `libs/libc/machine/mips/Make.defs`.\n- Update `LDMODULEFLAGS` in `arch/mips/src/mips32/Toolchain.defs` to include the\n little-endian (`-EL`) flag.\n- Update `up_coherent_dcache` for proper cache synchronization on JZ4780.\n\nSigned-off-by: Lwazi Dube \u003clwazeh@gmail.com\u003e\n" }, { "commit": "2567b729cf83f46f3ca1807fa09323dd49908e15", "tree": "a9ae36505a963b7afa81b142f773ebd19f81c553", "parents": [ "45c75f3bda61323b6dde58ac03b454e18b1a036a" ], "author": { "name": "Filipe Cavalcanti", "email": "filipe.cavalcanti@espressif.com", "time": "Tue Jul 28 18:32:09 2026 -0300" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 13:56:50 2026 +0800" }, "message": "arch/risc-v/espressif: fix SPI IOMUX false positive without SPI2\n\nSPI_VIA_IOMUX used SPI2 IOMUX pin macros that are undefined when SPI2\nis disabled or on chips without IOMUX SPI pins (e.g. ESP32-P4), so the\ndriver took the IOMUX path and never routed SPI3 via the GPIO matrix.\n\nSigned-off-by: Filipe Cavalcanti \u003cfilipe.cavalcanti@espressif.com\u003e\n" }, { "commit": "45c75f3bda61323b6dde58ac03b454e18b1a036a", "tree": "2a0631746ac0e174f9222591de9c565dfd1b6491", "parents": [ "894a08e35f0ef7c0c057d7721c90fb92122c8399" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Mon Aug 10 12:09:33 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 10:53:19 2026 +0800" }, "message": "fs/romfs: fix node cache overflow in directories with \u003e256 entries\n\nromfs_cachenode() tracked the allocated size of rn_child in a uint8_t\nwhile rn_count is a uint16_t. Past 256 entries the size wraps to zero,\nthe grow condition rn_count \u003d\u003d num - 1 can never be true again and the\narray is not reallocated: entries are written beyond the allocation,\ncorrupting the heap.\n\nTrack the allocated size in a size_t.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\nAssisted-by: Claude Code\n" }, { "commit": "894a08e35f0ef7c0c057d7721c90fb92122c8399", "tree": "fd2fc344de32aa4cd3e88a8c77aba6267ad85db8", "parents": [ "e9e93c3b2c95247fef9597288f2dfcb411e43350" ], "author": { "name": "Darryl Ring", "email": "darryl@bluerobotics.com", "time": "Fri Aug 07 15:27:49 2026 -0700" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 10:51:46 2026 +0800" }, "message": "arch/arm/stm32h5: Fix handling of GPIO port I\n\nCorrect the number of GPIO ports (STM32_NPORTS) from 8 to 9 and include\nGPIOI in the g_gpiobase array. Also fix the comparison that would\nprevent the GPIOI clock from being enabled (this is really a no-op,\nthough).\n\nSigned-off-by: Darryl Ring \u003cdarryl@bluerobotics.com\u003e\n" }, { "commit": "e9e93c3b2c95247fef9597288f2dfcb411e43350", "tree": "ef1704e09fd3494380e80104c97202d7d9ad7669", "parents": [ "7f6a0a30daeb724259b99b914f7e2fb075433889" ], "author": { "name": "zhangyu117", "email": "zhangyu117@xiaomi.com", "time": "Mon Jul 13 10:01:39 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Tue Aug 11 03:41:03 2026 +0800" }, "message": "arch/tricore: idle donot depend on illd\n\nReplace the iLLD Ifx_Ssw_infiniteLoop() helper in the idle path with\na self-contained \u0027loopu\u0027 instruction wrapper (tricore_idle_loop()).\nThe \u0027loopu\u0027 (loop unconditional) instruction branches back to itself\nuntil an interrupt is taken, which is the standard TriCore low-power\nidle sequence; the GNU and Tasking assemblers spell the backward\nlabel differently, so the macro dispatches on the toolchain.\n\nThis removes the arch/tricore idle path\u0027s dependency on the Infineon\niLLD/Ssw layer. No behavior change: the loop is still interrupted by\nany IRQ that causes a context switch away from the idle task.\n\nSigned-off-by: zhangyu117 \u003czhangyu117@xiaomi.com\u003e\n" }, { "commit": "7f6a0a30daeb724259b99b914f7e2fb075433889", "tree": "b0d95f6cf128f950fff93788486d9b6c555eff36", "parents": [ "9e33dc077acda55ef6e843135235ef0643ad4388" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Mon Aug 10 12:48:40 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Mon Aug 10 22:46:31 2026 +0800" }, "message": "boards/arm/stm32l4/b-l475e-iot01a: Add a QEMU nsh configuration.\n\nQEMU\u0027s b-l475e-iot01a machine models the STM32L4x5 core peripherals, but\nnot the QUADSPI controller or the on-board MX25R6435F flash. The nsh\nconfiguration therefore panics during board bring-up, inside\nstm32_qspi_initialize() -\u003e mx25rxx_initialize() -\u003e qspi_command(), before\nthe console has produced any output.\n\nAdd a qemu configuration that is nsh without CONFIG_B_L475E_IOT01A_MTD_FLASH\nand the QSPI/MTD/SMARTFS chain that symbol selects. It boots to an NSH\nprompt on USART1 under:\n\n qemu-system-arm -M b-l475e-iot01a -nographic -kernel nuttx\n\nDocument the new configuration, including the fact that QEMU\u0027s STM32L4x5\nUSART model never calls qemu_chr_fe_accept_input() after the guest reads\nRDR. Console input consequently stalls after the first byte or two when a\nline is pasted or piped in, although typing at human speed works.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "9e33dc077acda55ef6e843135235ef0643ad4388", "tree": "2535bdcaf776fd51b5527fb3034b4ba2ac814d83", "parents": [ "b5ec07b19b7150219857dc4025ff4873c65a269f" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Wed Aug 05 16:34:22 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 09:51:02 2026 -0300" }, "message": "Documentation/rtl8721f: add rtl8721f_evb board photo\n\nAdd the board photo and replace the placeholder todo in the RTL8721F EVB\ndocumentation index with a figure directive so the board page renders the\nhardware image, matching the other Realtek board pages.\n\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "b5ec07b19b7150219857dc4025ff4873c65a269f", "tree": "8a1af2551e5d15e22f5b2a897e2fda94c59397a2", "parents": [ "067e30e14f3e64a3b3d0bc6e63e23da2ce8ca39b" ], "author": { "name": "dechao_gong", "email": "dechao_gong@realsil.com.cn", "time": "Fri Jul 31 11:45:17 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 09:51:02 2026 -0300" }, "message": "arch/arm/rtl8721f: add UART character driver support\n\nExpose the RTL8721F general-purpose UARTs through the shared Ameba serial\ndriver in arch/arm/src/common/ameba. Only the chip-specific glue is added:\na new ameba_uart_chip.h supplying the green2 register bases, IRQs, clock\nmasks and UART TX/RX pin-mux function codes, plus the build wiring and a\nboard port table registering UART0 at /dev/ttyS1. The common serial layer\nis reused unchanged.\n\nA new \"uart\" board config enables the driver with the serialrx and\nserialblaster examples and runtime TERMIOS support.\n\nVerified on RTL8721F EVB hardware with a PA24/PA25 loopback: single-message\necho, 2600-byte serialrx/serialblaster throughput with no loss, and TERMIOS\nreconfiguration (CS7 data-bit truncation, parity and stop-bit ioctl\nround-trip, and 9600 baud reprogramming) all pass.\n\nSigned-off-by: dechao_gong \u003cdechao_gong@realsil.com.cn\u003e\nAssisted-by: Claude \u003cnoreply@anthropic.com\u003e\n" }, { "commit": "067e30e14f3e64a3b3d0bc6e63e23da2ce8ca39b", "tree": "bf5fff784b04408e534a628c963e1b7d048d73ab", "parents": [ "3557791ae21d5006e1c0cca13ce7d0683c73720c" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Sun Aug 09 15:13:39 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 08:57:30 2026 -0300" }, "message": "arch/x86_64: Build fork() children from the caller\u0027s syscall frame.\n\nIn a kernel build vfork() is reached through a system call, so the return\naddress and stack pointer the architecture\u0027s entry point can see for itself\nare the kernel\u0027s, not the caller\u0027s. A child built from those resumes at a\nkernel address, which is why x86_64 selected the fork family only for the\nflat build.\n\nx86_64_syscall() now publishes the caller\u0027s frame in xcp.sregs for the\nduration of the stub call, and x86_64_fork() builds the child from it:\n\n x86_64_fork_syscall() when xcp.sregs is non-NULL, so that the child\n returns from the very same `syscall\u0027 instruction as\n the parent, in user mode, on its own stack;\n x86_64_fork_direct() otherwise, which is the flat build and any kernel\n thread that calls the entry point as a plain\n function.\n\nThe discriminator is xcp.sregs rather than TCB_FLAG_SYSCALL, which arm64 and\nRISC-V use: that flag also defers signal actions, x86_64 has never raised it,\nand its kernel-build signal path does not survive being made to -- a\npre-existing problem that does not belong to this work.\n\nTwo properties of SYSCALL/SYSRET shape the child\u0027s frame. The instruction\nleaves the caller\u0027s RIP and RFLAGS in RCX and R11 rather than on a stack, so\nthey are moved into the RIP and RFLAGS slots of the interrupt frame the child\nis resumed from; and the hardware never records the caller\u0027s CS and SS at all,\nSYSRETQ reconstructing them from IA32_STAR, so the child\u0027s are filled in with\nthe user code and data selectors at RPL 3. The frame is therefore not copied\nwholesale: the extended state and the general registers are inherited, while\nthe segment registers and the thread pointer stay as up_initial_state() left\nthem, the child\u0027s stack being a fresh allocation the parent\u0027s FS base does not\ndescribe.\n\nx86_64_fork_relocfp() is new and is not optional here. A function returns\nwith `leave\u0027, which feeds the frame pointer into the stack pointer, so\nrelocating only the RBP the child resumes with gets it exactly one frame:\nthe next return loads a saved RBP still pointing into the parent\u0027s stack.\n\nWith that in place ARCH_X86_64 can select ARCH_HAVE_VFORK unconditionally.\n\nBuild-verified on qemu-intel64:knsh_romfs and qemu-intel64:ostest. NuttX on\nqemu-intel64 requires tsc-deadline and pcid, which TCG does not implement, so\nit cannot be run on this host.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "3557791ae21d5006e1c0cca13ce7d0683c73720c", "tree": "1ad1f384b8cadd83b05d7956f40428ba2f4cfca3", "parents": [ "0aaa04d0558c2fc0ce9791a6aa40c21a7a993c90" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Sun Aug 09 15:08:43 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 08:57:30 2026 -0300" }, "message": "arch/arm64: Build fork() children from the caller\u0027s syscall frame.\n\nIn a kernel or protected build vfork() is reached through a system call, so\nthe return address and stack pointer that the entry point in\narm64_fork_func.S can snapshot for itself belong to the kernel-side stub, not\nto the caller. A child built from that snapshot resumes at a kernel address\non a kernel stack. This is why arm64 selected the fork family only for the\nflat build.\n\nRecord what the caller was actually doing instead. arm64_sync_exc passes the\nexception frame to dispatch_syscall() in x7 -- x0-x6 carry the call number and\nits six parameters, so x7 is free -- and dispatch_syscall() stores it in\nxcp.sregs, mirroring what riscv_swint.c does.\n\narm64_fork() then chooses where the caller\u0027s registers live:\n\n arm64_fork_syscall() when TCB_FLAG_SYSCALL is set, rebuilding the child\n from xcp.sregs so that it returns from the very same\n SVC as the parent;\n arm64_fork_direct() otherwise, which is the flat build and any kernel\n thread that calls the entry point as a plain function.\n\nThe stack copy and the relocation of pointers into it are shared by both\npaths in arm64_fork_stack() and arm64_fork_reloc().\n\nWith that in place ARCH_ARM64 can select ARCH_HAVE_VFORK unconditionally.\n\nVerified on qemu-armv8a:knsh (BUILD_KERNEL), qemu-armv8a:nsh (BUILD_FLAT) and\nqemu-armv8a:citest_smp under qemu-system-aarch64: ostest\u0027s vfork_test passes\non all three, and it was absent from knsh before the change. The protected\nconfigurations are build-verified only (fvp-armv8r:pnsh), there being no\nemulator for them here.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "0aaa04d0558c2fc0ce9791a6aa40c21a7a993c90", "tree": "4ba820a127df0077c73754945ae675dd3c793ae6", "parents": [ "608d1e269a77bf1b50582c5e1c43422f67017331" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Sun Aug 09 14:53:46 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 08:57:30 2026 -0300" }, "message": "arch/arm: Restore vfork() on 32-bit ARM kernel builds.\n\nARCH_ARM has selected ARCH_HAVE_VFORK only \"if !BUILD_KERNEL\" since the\nfork()/vfork() split. That condition was deliberate but temporary: it was\nadded because the fork family had never worked on a 32-bit ARM kernel build --\nthe entry point in fork.S snapshots the kernel-side stub rather than the\ncaller, so a child resumes at a kernel address -- and said in as many words\nthat \"arch/arm takes the condition off again in the patch that adds its\nsaved-syscall-frame path\".\n\nThat patch is the one before this. arm_syscall() records the caller\u0027s\nexception frame in xcp.sregs and arm_fork() builds the child from it, so the\ncondition has nothing left to protect against.\n\nCortex-M is unaffected either way -- BUILD_KERNEL depends on ARCH_USE_MMU,\nwhich it does not have -- so the only configurations this changes are the\nMMU-capable ARM ports, which are exactly the ones the previous commit fixed.\n\nVerified on qemu-armv7a:knsh under qemu-system-arm: ostest\u0027s vfork_test\npasses, where before the change vfork() was absent.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "608d1e269a77bf1b50582c5e1c43422f67017331", "tree": "2df68f5fa7a59ae9e03d5e1154446bc3bdb32554", "parents": [ "aae62ceaae723de61e2bc563dd1ff3ac298bc9f7" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Sun Aug 09 14:53:32 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 08:57:30 2026 -0300" }, "message": "arch/arm: Build fork() children from the caller\u0027s syscall frame on armv7-a.\n\nIn a kernel build the cloning primitives are reached through a system call,\nand armv7-a dispatches one by re-pointing the caller\u0027s own exception frame at\ndispatch_syscall() and switching to the task\u0027s kernel stack. The snapshot the\nentry point in fork.S takes for itself therefore describes the kernel-side\nstub, and the frames below it are on a stack the child gets no copy of: a\nchild built from that snapshot resumes at a kernel address with a stack\npointer into its own user stack. It faulted with a prefetch abort at PC 0 on\nqemu-armv7a:knsh, which is why the fork family had never been run there.\n\nRecord what the caller was actually doing instead. arm_syscall() stores the\nexception frame of the outermost system call in xcp.sregs, mirroring\nriscv_swint.c, and arm_fork() chooses where the caller\u0027s registers live:\n\n arm_fork_syscall() when a user stack pointer is saved, rebuilding the child\n from xcp.sregs so that it returns from the very same SVC\n as the parent, in the same mode, on its own stack and\n with no inherited system call nesting;\n arm_fork_direct() otherwise -- the flat build, a kernel thread in any\n build, and a build without a kernel stack, where the\n call is dispatched on the caller\u0027s own stack so the\n caller\u0027s frames are copied along with the kernel-side\n ones.\n\nNote that the discriminator is xcp.ustkptr rather than TCB_FLAG_SYSCALL. On\narmv7-a the caller is the task that runs the kernel side of its own system\ncall, so being in a system call is not by itself a reason to distrust the\nsnapshot; the switch to the kernel stack is. Because arm_syscall() has\nalready re-pointed the frame by the time arm_fork() runs, the caller\u0027s PC,\nCPSR and SP come from where arm_syscall() put them -- syscall[0].sysreturn,\nsyscall[0].cpsr and ustkptr -- and the rest from the frame itself.\n\nNothing selects the primitives on an ARM kernel build yet, so this commit\nchanges no configuration; it is what the next one needs to be correct.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "aae62ceaae723de61e2bc563dd1ff3ac298bc9f7", "tree": "1eb51bfe21936333dc3fbbd103c250be170d6f23", "parents": [ "70c2ef5911cc281b4a6e8a6f7412cf68c9e3a99a" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Fri Aug 07 12:13:14 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 08:57:30 2026 -0300" }, "message": "!Documentation: Describe the fork()/vfork() split.\n\nDocumentation/guides/fork_vfork_migration.rst is new. It says what changed\nand why, gives the two primitives as a table, states plainly what breaks, and\nanswers \"which replacement do I want?\" from the reader\u0027s own reason for having\ncalled fork() -- posix_spawn() or vfork() to run a program, pthread_create()\nfor a second flow of control that shares memory, fork() itself for an\nindependent copy. It also documents the two configuration symbols, what an\narchitecture has to implement to gain real fork(), and the one visible\nconsequence of moving the vfork() suspension into the kernel: a waitpid()\nafter a child that _exit()s can only report status where\nCONFIG_SCHED_CHILD_STATUS is enabled.\n\nreference/user/01_task_control.rst gains an entry for fork() and rewrites the\none for vfork(), which described NuttX\u0027s limitations rather than the\ninterface\u0027s contract. standards/posix.rst moves fork() from \"No\" to \"Cond.\"\nand vfork() from \"Yes\" to \"Cond.\", both being conditional on the configuration\nnow. implementation/memory_configurations.rst no longer lists fork() as\nunimplementable in the presence of address environments, which was the whole\npoint of that section\u0027s wish list. Three long-standing typos in that file are\ncorrected while touching it, since codespell checks the whole of any file a\npatch modifies.\n\nBREAKING CHANGE: this commit carries no code; it is the migration guide for\nthe fork() withdrawal in the commit before it, and is marked so that every\ncommit in the series carries the marker CONTRIBUTING.md 1.13 requires. The\nquick fixes are in Documentation/guides/fork_vfork_migration.rst.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "70c2ef5911cc281b4a6e8a6f7412cf68c9e3a99a", "tree": "726bed8b26c886731110c9e96590de3621c7b8d7", "parents": [ "87260499e192e5a7903a5175cbea402e929070f5" ], "author": { "name": "Marco Casaroli", "email": "marco.casaroli@gmail.com", "time": "Fri Aug 07 12:12:59 2026 +0200" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Mon Aug 10 08:57:30 2026 -0300" }, "message": "!sched/arch/libc: Give fork() and vfork() their real, separate semantics.\n\nNuttX implemented fork() and vfork() as the same function. Both were libc\nwrappers around a single up_fork() syscall; vfork() differed only by a\ntrailing waitpid(). Underneath, the child joined the parent\u0027s address\nenvironment -- the same addrenv_join() that pthread_create() uses -- and got\na private copy of the stack. So the child shared .data, .bss and the heap\nwith its parent and ran concurrently with it.\n\nThat is not fork(). It is vfork()-with-a-private-stack under fork()\u0027s name,\nand the history says so: today\u0027s fork() is NuttX\u0027s old vfork(), renamed in\nc33d1c9c97 (2023) without any change of behaviour. The failure was silent --\na program written against POSIX fork() compiled, ran, and had its child\u0027s\nwrites land in the parent\u0027s variables.\n\nSeparate them into two primitives, chosen by which function the caller\ncalled rather than by what the hardware happens to be:\n\n fork() child gets its own copy of the parent\u0027s memory at the same\n virtual addresses; runs concurrently. Only where an address\n environment can be duplicated -- elsewhere it is not declared at\n all, so calling it is a build error naming the function.\n vfork() child shares the parent\u0027s memory; parent suspended until the\n child _exit()s or exec()s. Implementable everywhere.\n\nBelow libc there is still one syscall. up_fork() gains a bool saying which\nprimitive the caller used, since the per-architecture register snapshot is\nthe same for both, and passes it to nxtask_setup_fork(), which is the single\nplace the memory semantics are decided. The argument arrives in the first\nargument register and is never touched: each architecture\u0027s snapshot takes\nsome other call-clobbered register for its scratch, so the flag is simply\nstill there when the C worker is called.\n\nThe vfork() parent suspension moves out of libc into nxtask_start_fork(),\nreleased from nxsched_release_tcb() by nxtask_resume_vfork(). Two things\nfollow: the parent is resumed at exec(), since exec_swap() has already handed\nthe child\u0027s pid to the loaded program by the time the vfork stub exits, and\nvfork() no longer depends on CONFIG_SCHED_WAITPID.\n\nReleasing there requires one fix in nxtask_exit(). It raises rtcb-\u003elockcount\ndirectly rather than through sched_lock() while it tears the TCB down, so the\nnxsem_post() that wakes the vfork() parent leaves it queued where a blocked\ntask collects while pre-emption is off -- g_pendingtasks, or g_readytorun on\nSMP -- and the matching raw lockcount-- does not publish it the way\nsched_unlock() would, leaving the parent stranded with nothing to move it on.\nThe fix mirrors sched_unlock() for each case: nxsched_merge_pending(), or\nnxsched_deliver_task() under CONFIG_SMP. Both are no-ops while pre-emption is\nstill disabled, and up_exit() re-reads this_task() afterwards, so a change of\nthe ready-to-run head is honoured. Without it vfork() deadlocks wherever no\nother task happens to call sched_unlock() afterwards -- rv-virt:nsh64 and\nrv-virt:pnsh64, where NSH is blocked in waitpid() holding the lock, and\nqemu-armv8a:citest_smp, which hangs the moment the vfork() test runs.\n\nfork() is built on a new addrenv_fork(), backed by an up_addrenv_fork() hook\nthat duplicates an address environment into freshly allocated pages mapped at\nthe same virtual addresses -- unlike up_addrenv_clone(), which copies only\nthe representation and leaves both pointing at the same page tables. The\nchild then adopts the parent\u0027s stack geometry rather than being given a\nrelocated copy: a pointer to a stack local taken before fork() must name the\nsame object in the child that it named in the parent, and the parent\u0027s stack\nis already in the duplicate, with its contents, at the parent\u0027s address.\n\nNo architecture implements up_addrenv_fork() yet, so this commit leaves\nfork() unavailable everywhere. That is the intended state. It withdraws\nfork() from ARCH_ARM, flat ARCH_ARM64, ARCH_RISCV, ARCH_SIM and ARCH_X86_64,\nwhere until now it named the sharing primitive; per-architecture patches\nrestore it, with POSIX semantics, as up_addrenv_fork() lands. In the\nmeantime the sharing primitive is still there under the name that describes\nit: vfork() for a child that runs a program, pthread_create() for a second\nflow of control that shares memory, posix_spawn() for both at once.\n\nKconfig: ARCH_HAVE_VFORK inherits ARCH_HAVE_FORK\u0027s select lines, conditions\nincluded, so no configuration gains machinery; ARCH_HAVE_FORK is redefined to\nmean \"can provide POSIX fork() semantics\" and now depends on ARCH_ADDRENV.\n\nThere is one deliberate departure from \"verbatim\". ARCH_ARM selected the\nfork family unconditionally, BUILD_KERNEL included, and that has never\nworked: on a kernel build the architecture\u0027s fork entry point sees the\nkernel\u0027s return address and stack pointer rather than the caller\u0027s, so the\nchild resumes at a kernel address. On qemu-armv7a:knsh master faults in\nostest\u0027s fork case with \"Child did not run\" and then a data abort; without\nthe condition this change faults the same way through vfork(). ARCH_ARM64\nand ARCH_X86_64 already carried \"if !BUILD_KERNEL\" for exactly this reason --\nARM was the outlier. Conditioning it turns a runtime fault into an honest\nabsence, which is the whole point of the change; arch/arm takes the condition\noff again in the patch that adds its saved-syscall-frame path. Only the\nMMU-capable ARM ports are affected, since Cortex-M cannot build BUILD_KERNEL\nat all.\n\nAlso fixes two latent syntax errors found on the way: a missing comma in\nriscv_fork.c and mips_fork.c, both in *_FRAMEPOINTER \u0026\u0026 !SAVE_GP branches\nthat are never compiled today.\n\nBREAKING CHANGE: fork() is withdrawn from every architecture. It is no\nlonger declared in unistd.h, so code that calls it fails to build with an error\nnaming the function, and the sharing behaviour it used to have is gone rather\nthan renamed. CONFIG_ARCH_HAVE_FORK no longer means \"fork() exists\"; it means\n\"this configuration can provide POSIX fork() semantics\", and no architecture\nselects it yet.\n\nQuick fix, chosen by why the call was made:\n\n to run a program vfork() + exec*(), or better posix_spawn()\n a second flow of control that pthread_create()\n shares the caller\u0027s memory\n a genuinely independent copy keep fork(), and wait for the per-arch patch\n of the process that implements up_addrenv_fork() and selects\n CONFIG_ARCH_HAVE_FORK\n\nOut-of-tree code that tests CONFIG_ARCH_HAVE_FORK to decide whether a\nfork-then-exec path is available wants CONFIG_ARCH_HAVE_VFORK instead, which is\nselected in exactly the places CONFIG_ARCH_HAVE_FORK used to be. The full\nmigration guide is Documentation/guides/fork_vfork_migration.rst.\n\nAssisted-by: Claude Code:claude-opus-5\nSigned-off-by: Marco Casaroli \u003cmarco.casaroli@gmail.com\u003e\n" }, { "commit": "87260499e192e5a7903a5175cbea402e929070f5", "tree": "144bc9bdf3c987cca809bc796b5508471f584d29", "parents": [ "b8e26b127e4c0b17652aba1770da5cda6e6b6fd1" ], "author": { "name": "Alan Carvalho de Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:52:46 2026 -0300" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sun Aug 09 11:13:08 2026 -0300" }, "message": "cmake: Use NUTTX(_DIR/_BIN_DIR) instead CMAKE(_SRC_DIR/_BIN_DIR)\n\nThis change fixes NuttX’s CMake support when NuttX is embedded\nin another project via add_subdirectory(). CMake’s CMAKE_SOURCE_DIR\nand CMAKE_BINARY_DIR refer to the outermost project, causing NuttX\nto access its .config, generated files, host tools, and build artifacts\nin the parent project’s directories. The fix introduces NUTTX_DIR and\nNUTTX_BINARY_DIR, based on CMAKE_CURRENT_SOURCE_DIR and\nCMAKE_CURRENT_BINARY_DIR, and consistently uses them for NuttX\nself-references while preserving existing standalone builds. It fixes\nthe Kconfig initialization failure reported in #19697 and allows an\nembedded sim:nsh build to configure, build, and boot successfully.\nThe change affects only the CMake build system (not Make or Kconfig\ndefaults), requires the corresponding nuttx-apps change, and does not\nextend add_subdirectory() support to cross-compiled non-sim boards due\nto CMake’s toolchain-file limitation.\n\nFixes #19697.\n\nAssisted-by: Claude:claude-sonnet-5\nSigned-off-by: Alan Carvalho de Assis \u003cacassis@gmail.com\u003e\n" }, { "commit": "b8e26b127e4c0b17652aba1770da5cda6e6b6fd1", "tree": "1fe3ee523f69fe36db5c135c9f9d7bdbbf6901b0", "parents": [ "a023f61a3811452e95156f7b68bd1a81910db93a" ], "author": { "name": "Justin Hammond", "email": "justin@dynam.ac", "time": "Thu Aug 06 13:05:20 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Sun Aug 09 20:57:41 2026 +0800" }, "message": "drivers/usbhost: Let the HID keyboard pick its interrupt pipe.\n\nHIDKBD_NOGETREPORT reads keyboard reports with DRVR_ASYNCH(), and that\nmacro is only defined when USBHOST_ASYNCH is set. The option selected\nneither, so turning it on by itself fails at the call site with no hint\nthat a second option was meant to come with it.\n\nSelect it. Every in-tree configuration that sets NOGETREPORT already\nresolves USBHOST_ASYNCH: ci20:jumbo and sama5d3-xplained:bluetooth\nthrough USBHOST_HUB, and the two linum-stm32h753bi configurations by\nsetting it directly. No existing build changes.\n\nThe two that set it directly no longer can, since a selected symbol is\nno longer settable, so savedefconfig drops the line. Their defconfigs\nare normalized here to keep them canonical.\n\nAssisted-by: Claude:claude-opus-5\nSigned-off-by: Justin Hammond \u003cjustin@dynam.ac\u003e\n" }, { "commit": "a023f61a3811452e95156f7b68bd1a81910db93a", "tree": "f9593897bd193d4f4255d94f89214e083179f274", "parents": [ "31fbb9921899325fc0c17e39cda90d0d621c4eae" ], "author": { "name": "Justin Hammond", "email": "justin@dynam.ac", "time": "Wed Aug 05 19:09:26 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Sun Aug 09 20:57:41 2026 +0800" }, "message": "drivers/usbhost: Do not unregister a HID keyboard that never registered.\n\nusbhost_destroy() unregisters the keyboard unconditionally, and it runs\nfor a device that never got as far as being registered as well: an\nenumeration that failed part way through, or a device unplugged while it\nwas still being set up.\n\nThe upper half does not tolerate that call. It asserts that the lower\nhalf carries the state keyboard_register() puts there, so a keyboard that\nfails to come up takes the system down with an assertion rather than\nbeing cleaned up and forgotten. Seen on a low speed keyboard that\nattaches and then does not finish enumerating.\n\nThe state the registration leaves behind is what says whether there is\nanything to undo, so look at it first.\n\nAssisted-by: Claude:claude-opus-5\nSigned-off-by: Justin Hammond \u003cjustin@dynam.ac\u003e\n" }, { "commit": "31fbb9921899325fc0c17e39cda90d0d621c4eae", "tree": "d08b8a76df74d7ff61fcf1e7fff279f047d7676d", "parents": [ "753d2a34667b41df648d9bc50b4d2db68523cdb5" ], "author": { "name": "Justin Hammond", "email": "justin@dynam.ac", "time": "Tue Aug 04 19:15:06 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Sun Aug 09 10:05:30 2026 +0800" }, "message": "sched/semaphore: Keep a negative task id out of the mutex holder.\n\nA mutex records its holder as a task id in the low 31 bits of a word\nwhose top bit means \"someone is blocked on this\". The id was stored\nwithout masking, so an id with its top bit set became a holder with the\nblocking bit raised.\n\nTask ids are normally small and positive, but not always.\nnxsched_gettid() reports -ESRCH for a context that no longer maps to a\nrunning task, and there is a window where that is exactly what the\nrunning context is: nxtask_exit() marks the next task ready to run\nwhile the dying task is still executing on its own stack, and only then\nreleases the TCB. Freeing the group inside that release takes and\ndrops the group\u0027s mutexes, so the lock stores 0xfffffffd and the unlock\ncompares 0x7ffffffd, which are not equal.\n\nWith assertions enabled the unlock trips its holder check, and every\nexit of a process that frees memory panics. In a kernel build that is\nevery exit, so no program could be run twice, and running one at all\ntook the shell down with it. Without assertions the failure is silent:\nthe accidental blocking bit sends the unlock looking for a waiter that\nnever existed.\n\nEncode the id the same way everywhere it is stored or compared, so that\na lock and an unlock from one context agree whatever the id\u0027s sign.\nThe masked forms of -1 and -2 would alias the \"no holder\" and \"reset\"\nvalues, but nxsched_gettid() yields only valid ids and -ESRCH.\n\nmm_lock() already sidesteps this window with a note that gettid() may\nreturn -ESRCH during a context switch; this gives the generic mutex the\nsame footing rather than a second special case.\n\nTest case, on the EIC7700 EVB, which is a kernel build with assertions:\n\n nsh\u003e hello\n Hello, World!!\n\nBefore, that printed and then panicked in sem_post, taking the shell\nwith it, every time. After, five runs in a row complete and the shell\nsurvives. ps over telnet still completes.\n\nAssisted-by: Claude:claude-opus-5\nSigned-off-by: Justin Hammond \u003cjustin@dynam.ac\u003e\n" }, { "commit": "753d2a34667b41df648d9bc50b4d2db68523cdb5", "tree": "48ee004b32a1863142f146a9c54d6ac91a4892b3", "parents": [ "e7ef45d39a9bae23f674390f4b162d38ae1012d0" ], "author": { "name": "raiden00pl", "email": "raiden00@railab.me", "time": "Tue Jul 21 15:07:56 2026 +0200" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Sun Aug 09 03:23:28 2026 +0800" }, "message": "drivers/serial: fetch uart_writev data from the iovec segment\n\nSince 00010089b8 uart_writev() takes the data one byte at a time with\nuio_copyto() plus uio_advance(). Both of them walk the iovec list and\nredo the byte counters for every single byte, so most of the work is\nbookkeeping rather than copying. On slow cores this is what limits how\nfast the TX buffer can be filled.\n\nTake a pointer to the current iovec segment and read the bytes straight\nfrom it, and move the uio forward once per segment instead of once per\nbyte. nseg counts only the bytes that really went into the buffer: it\nis increased at the end of a loop pass, and that step is skipped when\nuart_putxmitchar() fails.\n\nMeasured on nRF52840 (Cortex-M4, 64 MHz), 8 MiB write() to a CDC/ACM\nport: 223 KB/s to 481 KB/s.\n\nSigned-off-by: raiden00pl \u003craiden00@railab.me\u003e\nAssisted-by: Claude Code\n" }, { "commit": "e7ef45d39a9bae23f674390f4b162d38ae1012d0", "tree": "eed6e0d4dc4f3b000db5556678fa52ae787fa1e0", "parents": [ "3839a11f2b89180e65c2c81c60a48a35558892c0" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Sat Aug 08 12:11:50 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "Documentation: add devfreq framework documentation\n\nDocument the device frequency scaling framework: the QoS/governor arbitration model, the lower-half driver interface, built-in governors, in-kernel QoS requests, change notifications, procfs, and suspend/resume.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "3839a11f2b89180e65c2c81c60a48a35558892c0", "tree": "729dfe667eeb7c2b32d3ec7ecbf2e2a5ed5b0cc6", "parents": [ "2d66436185df293ca3832c2e326067892e0fcebc" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Sat Aug 08 11:37:55 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: add ondemand governor build support\n\nAdd Kconfig, Make.defs, and CMakeLists.txt entries for the ondemand governor so it can be enabled via CONFIG_DEVFREQ_GOV_ONDEMAND.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "2d66436185df293ca3832c2e326067892e0fcebc", "tree": "d6e20462570497fc622d3e2726a7b265d406afe6", "parents": [ "31041f84ea62670d8e7eebfa07ce4b9ca05086dc" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Fri Mar 13 16:41:23 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: guard backtrace code with CONFIG_LIBC_BACKTRACE_DEPTH\n\n\nWhen CONFIG_LIBC_BACKTRACE_DEPTH is not set or \u003c\u003d 0, backtrace_get()\nis a macro that always sets depth to 0, making the for-loop body\nunreachable (Coverity CID 8405332 DEADCODE).\n\nWrap backtrace_get() call, the loop, and related variable declarations\nwith #if CONFIG_LIBC_BACKTRACE_DEPTH \u003e 0 to eliminate the dead code\nand avoid unused variable warnings.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "31041f84ea62670d8e7eebfa07ce4b9ca05086dc", "tree": "b137e00bfa53f3fdf22ebebd2fa846b2775351a7", "parents": [ "674e5ef4d8bce0d9fec173377bb5c076f9ece7f0" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Fri Mar 06 16:26:00 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: fix qos_get_value returning wrong min/max aggregation\n\n\nQOS_REQ_MIN should return the highest value among all min requests\n(most restrictive lower bound), but plist_first returns the lowest.\nQOS_REQ_MAX should return the lowest value among all max requests\n(most restrictive upper bound), but plist_last returns the highest.\n\nThis caused qos constraints to be ineffective. For example, two\nrequests (32, 208000) and (104000, 104000) would merge to (32, 208000)\ninstead of the correct (104000, 104000).\n\nFix by using plist_last for QOS_REQ_MIN and plist_first for QOS_REQ_MAX.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "674e5ef4d8bce0d9fec173377bb5c076f9ece7f0", "tree": "823e9cc842b81db6bcbff37a03e1e0c6c509e1b2", "parents": [ "414694b7803c5e12794ec4a6872eaea662806a59" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Fri Mar 06 14:17:58 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: use hardware frequency instead of cached value in driver_target\n\n\nThe cached devfreq-\u003ecur may become stale when the hardware frequency is\nchanged externally (e.g. by another core or governor). This causes\ndriver_target to incorrectly skip frequency transitions when the target\nmatches the cached value but differs from the actual hardware frequency.\n\nUse driver-\u003eget_frequency() to read the real hardware frequency for the\nunchanged check, and sync devfreq-\u003ecur on match to keep the cache correct.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "414694b7803c5e12794ec4a6872eaea662806a59", "tree": "4364a105ca9bf5e9faaf76827e5aa16c416f7d66", "parents": [ "77cb20f041dc1830de88b68ee06549d74958e512" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Tue Mar 10 11:52:54 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "devfreq/ondemand: fix use-after-free in ondemand worker\n\n\nWhen devfreq_gov_ondemand_stop() is called from idle task context,\nwork_cancel() is used instead of work_cancel_sync(), which does not\nwait for the currently running worker to complete. If\ndevfreq_gov_ondemand_exit() then frees governor_data, the worker\nmay still be accessing it, causing a use-after-free crash.\n\nFix this by:\n- Nullifying dev-\u003egovernor_data under dev-\u003elock in exit before freeing.\n- Moving the governor_data read inside dev-\u003elock in the worker and\n adding a NULL check to bail out early if data has been freed.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "77cb20f041dc1830de88b68ee06549d74958e512", "tree": "8944fe015ef8c99abaf2ec0bb5da9a87e4a83d3f", "parents": [ "7a1c62911d35bc7cf9b0ecbecac9cc7589dc955c" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Fri Mar 06 11:31:51 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: add conflict_policy to devfreq_driver_s\n\n\nWhen multiple QoS requests have no overlapping frequency range (min \u003e max), the previous behavior always clamped to the lower frequency. Add a conflict_policy field to devfreq_driver_s so callers can choose between DEVFREQ_CONFLICT_PREFER_HIGH (default, choose higher freq) and DEVFREQ_CONFLICT_PREFER_LOW (choose lower freq) at registration.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "7a1c62911d35bc7cf9b0ecbecac9cc7589dc955c", "tree": "525d0920c78f4a0bc477b5b157c4fb55141160f2", "parents": [ "ecd64e04c0e15218e1c518781d55f9674a4b380b" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Tue Mar 17 21:31:03 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "devfreq/procfs: add write support for frequency QoS constraints\n\n\nAdd the ability to set frequency constraints via procfs write.\nSupported formats:\n echo \u003cmin\u003e,\u003cmax\u003e \u003e /proc/devfreq/\u003cname\u003e - set frequency range\n echo 0,0 \u003e /proc/devfreq/\u003cname\u003e - remove constraint\n\nThe QoS request is bound to the devfreq device lifetime so that\nshell commands like echo (which open, write, close immediately)\nwork correctly. Leading whitespace in the write buffer is skipped\nto handle extra writes from nsh echo (e.g. trailing newline).\n\nAlso add write permissions in devfreq_stat() and a procfs_qos\nfield in devfreq_s guarded by CONFIG_DEVFREQ_PROCFS.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n(cherry picked from commit 70ae195c84f35a4d0b85fcc14187989b60fc0280)\n" }, { "commit": "ecd64e04c0e15218e1c518781d55f9674a4b380b", "tree": "f9aabf7600b7caccf14c90c589228d6c1a79c3fa", "parents": [ "072cae519349b42c3b7866e0118145a36162fb7c" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Mon Nov 17 11:57:26 2025 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: replace mutex to spinlock\n\n\nwe may call devfreq_find_by_name() in pm_callback, and shouldn\u0027t call nxmutex_lock() in idle_loop, so replace mutex to spinlock.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "072cae519349b42c3b7866e0118145a36162fb7c", "tree": "e92d583fd04a2ec3ea65c44f2c61b43b8c585b8a", "parents": [ "4f6a0bd36c53d55cbe9a5ef7b930127e3bdaef7c" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Fri Nov 14 16:12:56 2025 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: ondemand should init governor_data before use it\n\n\ndevfreq_qos_add_request -\u003e devfreq_refresh_limit -\u003e devfreq_limit_governor -\u003e devfreq_gov_ondemand_limit, here use governor_data but it\u0027s 0x0\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "4f6a0bd36c53d55cbe9a5ef7b930127e3bdaef7c", "tree": "c7e450dfa0304c57c2e4cb9f2ef1dfff7f4389dd", "parents": [ "20cb512617206a6055341017b9d0bd2558d28b90" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Sat Aug 08 11:35:35 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: add ondemand governor\n\nAdd devfreq ondemand governor that scales device frequency based on CPU load. When CPU load exceeds the configured threshold, frequency is set to maximum; otherwise it is scaled proportionally.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "20cb512617206a6055341017b9d0bd2558d28b90", "tree": "b307a792e5adc26eed8954613d016b8a9b132485", "parents": [ "1e2f9745cb811b807544e2917e08ec2f2da5be44" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Thu Oct 09 17:50:12 2025 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: add const to devfreq_governor_s and devfreq_driver_s\n\n\nwe do not hope the governor and driver in devfreq to be modified.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "1e2f9745cb811b807544e2917e08ec2f2da5be44", "tree": "f432c59a433d97a607b7375476fcec0f8d25fdc8", "parents": [ "827b455f68bf16c846ac743055e4ddb0a3183e6e" ], "author": { "name": "guanyi3", "email": "guanyi3@xiaomi.com", "time": "Tue Sep 30 12:15:42 2025 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "drivers/devfreq: remove default governor\n\n\nIt\u0027s better not to use global governor, as modifying one device will cause all devices\u0027 governor to be modified.\n\nSigned-off-by: guanyi3 \u003cguanyi3@xiaomi.com\u003e\n" }, { "commit": "827b455f68bf16c846ac743055e4ddb0a3183e6e", "tree": "42ca6e21e7de6e84c3698d52b473191c6b17cc30", "parents": [ "e29a7bcb077be8584a82b4ab6e6846eadfd9ffbd" ], "author": { "name": "guanyi", "email": "guanyi@xiaomi.com", "time": "Fri May 16 16:07:54 2025 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "driver/devfreq: add procfs for devfreq\n\n\n\u003e ls /proc/devfreq\n /proc/devfreq:\n test_devfreq\n\u003e cat /proc/devfreq/test_devfreq\n devfreq: test_devfreq\n governor: test_devfreq_governor\n cur_freq: 500\n suspended: False\n freq_table: 100 300 500 700 900\n qos_list(min, max, backtrace):\n 195, 829, 0x4007c26 0x40a0e0e 0x405c706 0x4011186 0x4010dca 0x42777cc 0x4062f7e 0x409da6a\n\nSigned-off-by: guanyi \u003cguanyi@xiaomi.com\u003e\n" }, { "commit": "e29a7bcb077be8584a82b4ab6e6846eadfd9ffbd", "tree": "441c8986ac6a641b5cde4288e07527e4ce126cd3", "parents": [ "875e86bd35db31ddfa99a2e21ed01807fff6725b" ], "author": { "name": "guanyi", "email": "guanyi@xiaomi.com", "time": "Wed Apr 02 14:19:24 2025 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:23:54 2026 -0300" }, "message": "driver/devfreq: DVFS framework for devices\n\nThis commit introduces a devfreq framework to manage device frequency\nscaling. The framework includes the following features:\n1.devfreq governor\n - provide governor ops, including init, start, stop, exit\n - default governor, performance \u0026 powersave\n - customized governor, device can provide governor when register\n2.runtime register and unregister\n - device can runtime register \u0026 unregister, search by name\n3.suspend and resume\n - suspend and resume frequency scaling\n4.notify\n - register \u0026 unregister notifier callback, notify frequency changes\n5.qos support\n - simplified QoS, manage multiple freq range request\n - including init, add/remove/update request, get value\n\nSigned-off-by: guanyi \u003cguanyi@xiaomi.com\u003e\n" }, { "commit": "875e86bd35db31ddfa99a2e21ed01807fff6725b", "tree": "8d7d1cf302545fee6bc982cb73995c0e67d3a76f", "parents": [ "d95d8c0fb1cf3453828cd87a7667e01fd94b7f14" ], "author": { "name": "Justin Hammond", "email": "justin@dynam.ac", "time": "Fri Aug 07 10:09:40 2026 +0800" }, "committer": { "name": "Alan C. Assis", "email": "acassis@gmail.com", "time": "Sat Aug 08 15:20:54 2026 -0300" }, "message": "syslog/ramlog: Survive writes made before the OS is ready.\n\nThe RAM log is the natural home for boot messages, yet writing to it\nduring early boot could crash the system it was meant to describe.\nramlog_addbuf took the critical section on every write, and\nenter_critical_section consults the current task; on ports whose\nfirst syslog output happens before the task lists exist, that lookup\nwalks uninitialized state and faults. The notification path was\nworse still, locking a scheduler that did not exist yet.\n\nGuard both. Before the task lists exist, plain interrupt masking\nprotects the buffer just as well, since there is only one thread of\ncontrol; and readers are only notified once there is an operating\nsystem to notify them through. The bytes land in the buffer either\nway, so nothing logged before the OS is ready is lost.\n\nFound on the EIC7700X port, which logs from its start routine before\nthe MMU is up: enabling RAMLOG_SYSLOG there turned the boot into a\nsilent wedge two characters in. With this change the same\nconfiguration boots and `dmesg` replays the full early history.\n\nAssisted-by: Claude:claude-opus-5\nSigned-off-by: Justin Hammond \u003cjustin@dynam.ac\u003e\n" }, { "commit": "d95d8c0fb1cf3453828cd87a7667e01fd94b7f14", "tree": "dd243465f86f241d8d3c42f3f1f319876c08ddc2", "parents": [ "58d1d9f9d6f512ce52828a850ac750aa41ceedd2" ], "author": { "name": "Justin Hammond", "email": "justin@dynam.ac", "time": "Sat Aug 08 14:52:17 2026 +0800" }, "committer": { "name": "Xiang Xiao", "email": "xiaoxiang781216@gmail.com", "time": "Sun Aug 09 02:09:47 2026 +0800" }, "message": "usbhost: Report each device as it is enumerated.\n\nA host that enumerates a device says nothing about it unless the whole of\nCONFIG_DEBUG_USB_INFO is on, and then it says a great deal else besides.\nThe quietest case is the one that matters most: a device no class driver\nclaims produces no output at all, so a user with an unsupported device\nsees exactly what a user with no device sees.\n\nAdd CONFIG_USBHOST_ANNOUNCE, reporting each device once, in the shape a\nreader is likely to recognise from other systems: where it is, what it is,\nits vendor, product and release, and the maker, product and serial number\nit reports in its own string descriptors. Those cost a control transfer\neach, so they are read only where a report was asked for, and only once\nthe device is addressed.\n\nThe report is made after binding rather than from within it, because a\ncomposite device never reaches the class lookup: usbhost_composite() is\ntried first and binds it. Whether a driver claimed the device is tracked\nrather than read from the returned status, which the per interface loop\nsets to OK whatever happened.\n\nThe port is given as the path from the root hub, and the path names the\nbus, because a device on the first port of a hub and one on the first port\nof a controller are otherwise reported identically. struct\nusbhost_roothubport_s gains that bus number for the purpose; a driver that\ndoes not set it reports zero, which is the only bus it has.\n\nClass codes are translated where a name is more use than a number, which\nincludes the HID boot protocols, so a keyboard is reported as a keyboard.\n\nDefault n, so no existing configuration changes.\n\nAssisted-by: Claude:claude-opus-5\nSigned-off-by: Justin Hammond \u003cjustin@dynam.ac\u003e\n" } ], "next": "58d1d9f9d6f512ce52828a850ac750aa41ceedd2" }