| commit | 90d73153fbeb631a5e27b78104371ebeb60a804a | [log] [tgz] |
|---|---|---|
| author | Ville Juven <ville.juven@unikie.com> | Wed Dec 13 17:52:08 2023 +0200 |
| committer | Xiang Xiao <xiaoxiang781216@gmail.com> | Thu Dec 14 06:54:17 2023 -0800 |
| tree | 28a3c3ae04d20759aa6b1c3b195bb1a794703575 | |
| parent | 80ca3e93080b775074560a0759f4f563b23d6f94 [diff] |
riscv/arch_elf: Check for _HI20 relocation validity As pointed out in #11322 there is a hardware design issue in RISC-V that affects RV64 relocations. The problem is with how address bits are loaded into registers via lui / auipc and sign extension. If the hi20 relocation value happens to have its 32-bit sign bit set, i.e. value is 0x80000000 (but not negative! i.e. negative in 64-bit format) the relocation will fail, as the address is erroneously sign extended: 0x00000000_80000000 becomes 0xffffffff_80000000 which is not correct. Also, make sure the correct opcode is used with PCREL_HI20, it expects AUIPC (not LUI). The C compiler will never emit such code but when hand- writing assembly code this can happen.
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