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<li class="toctree-l2 current"><a class="current reference internal" href="#">STM32 Null Pointer Detection</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="#using-the-mpu-to-detect-null-pointer-usage">Using the MPU to Detect Null Pointer Usage</a></li>
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  <section id="stm32-null-pointer-detection">
<h1>STM32 Null Pointer Detection<a class="headerlink" href="#stm32-null-pointer-detection" title="Permalink to this heading"></a></h1>
<section id="the-null-pointer-problem">
<h2>The NULL Pointer Problem<a class="headerlink" href="#the-null-pointer-problem" title="Permalink to this heading"></a></h2>
<p>A common cause of software bugs is null pointers. Pointers may be NULL if they
are un-initialized and un-checked. The use of NULL pointers almost always results
in something bad happening. Often, NULL pointer access can cause error exceptions
and or diagnostic crashes. But on MCUs that have valid address decoding at address
0x0000:0000, the use of NULL pointers may not cause a crash at all but may, instead,
cause strange behaviors that can sometimes be difficult to debug.</p>
</section>
<section id="cortex-m-memory">
<h2>Cortex-M Memory<a class="headerlink" href="#cortex-m-memory" title="Permalink to this heading"></a></h2>
<p>The Cortex-M family (Cortex-M0, M3, and M4) are such MCUs. They have their
interrupt vectors positioned at address zero. Because of this, NULL pointer
accesses will not necessarily cause crashes. Instead, the NULL pointers will
access memory in the vicinity of the vector table and who knows what will happen
next?</p>
</section>
<section id="stm32-memory-aliasing">
<h2>STM32 Memory Aliasing<a class="headerlink" href="#stm32-memory-aliasing" title="Permalink to this heading"></a></h2>
<p>The STMicro STM32 family of Cortex-M3/4 MCUs do things a little differently.
FLASH is physically addressed at address 0x0800:0000; the STM32 vector table
is then physically located at 0x0800:0000 instead of 0x0000:0000. If the STM32
hardware is configured to boot from FLASH, then the the STM32 will remap the
FLASH memory so that is aliased at address 0x0000:00000. In that way, the STM32
can boot from FLASH or external memory or any other memory region that it is
capable of mapping.</p>
<p>In the NuttX linker scripts, the applications are linked to execute from the
physical FLASH region at address 0x0800:0000. All valid FLASH memory access
will then access memory in the 0x0800:0000 FLASH address range. But illegal
NULL pointer access will access the aliased copy of FLASH beginning at 0x0000:0000.
So we still have the problem.</p>
</section>
<section id="the-cortex-m-memory-protection-unit">
<h2>The Cortex-M Memory Protection Unit<a class="headerlink" href="#the-cortex-m-memory-protection-unit" title="Permalink to this heading"></a></h2>
<p>The Memory Protection Unit (MPU) is an optional component of a Cortex-M implementation.
Most popular Cortex-M3/4 MCUs do support the MPU. The MPU can be used to protect regions
of memory so that if there is any attempted, unauthorized access to certain memory
regions, then a memory protection violation exception will occur and the system will
detect the illegal access.</p>
<p>See the ARM website for more information about the Cortex-M3/4 families and the
Cortex-M3/4 MPU. See, for example
<a class="reference external" href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0179b/CHDFDFIG.html">2.2. Memory Protection Unit (MPU)</a>.</p>
</section>
<section id="using-the-mpu-to-detect-null-pointer-usage">
<h2>Using the MPU to Detect Null Pointer Usage<a class="headerlink" href="#using-the-mpu-to-detect-null-pointer-usage" title="Permalink to this heading"></a></h2>
<p>So, for the STM32, one thing that we can do is to program the MPU to prohibit software
access to the memory region beginning at address 0x0000:0000. Petteri Aimonen posted a code
snippet on the NuttX Forum showing how to do this. Here is Petteri’s post:</p>
<div class="highlight-C notranslate"><div class="highlight"><pre><span></span><span class="cm">/* Catch any null pointer dereferences */</span>

<span class="kt">int</span><span class="w"> </span><span class="n">region</span><span class="w"> </span><span class="o">=</span><span class="w"> </span><span class="mi">0</span><span class="p">;</span>

<span class="n">putreg32</span><span class="p">(</span><span class="n">region</span><span class="p">,</span><span class="w"> </span><span class="n">MPU_RNR</span><span class="p">);</span>
<span class="n">putreg32</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span><span class="w"> </span><span class="n">MPU_RBAR</span><span class="p">);</span>
<span class="n">putreg32</span><span class="p">(</span><span class="n">MPU_RASR_ENABLE</span><span class="w"> </span><span class="o">|</span><span class="w"> </span><span class="n">MPU_RASR_SIZE_LOG2</span><span class="p">(</span><span class="mi">20</span><span class="p">)</span><span class="w"> </span><span class="o">|</span><span class="w"> </span><span class="p">(</span><span class="mh">0xFF</span><span class="w"> </span><span class="o">&lt;&lt;</span><span class="w"> </span><span class="n">MPU_RASR_SRD_SHIFT</span><span class="p">)</span><span class="w"> </span><span class="o">|</span><span class="w"> </span><span class="n">MPU_RASR_AP_NONO</span><span class="p">,</span><span class="w"> </span><span class="n">MPU_RASR</span><span class="p">);</span>
<span class="n">mpu_control</span><span class="p">(</span><span class="nb">true</span><span class="p">,</span><span class="w"> </span><span class="nb">false</span><span class="p">,</span><span class="w"> </span><span class="nb">true</span><span class="p">);</span>
</pre></div>
</div>
</section>
</section>


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