tree 63859f41a45fa0ba8c05a3e5e0533300cfb0dcdc
parent 06740a142f4904a152acb63d4611085a0745e8ae
author Jerzy Kasenberg <jerzy@apache.org> 1628112572 +0200
committer kasjer <kasjer@users.noreply.github.com> 1629358701 +0200

pic32: Improve context switch

- If current task is not changed instruction count is greatly reduced.
- Higher priority interrupts are enabled during context switch (at some point).
- rdpgpr/wrphpr pair is remove since it did not make any sense, context
  switch interrupt must use the same shadow register set as tasks otherwise
  all registers that were saved/restored would be taken from wrong register set.
- context switch interrupt handler did not modify SP register on entry
  saving register below SP. It only worked because during context switch
  interrupts were disabled, if they were enabled each interrupt even with
  different register set would overwrite task registers due rdpgpr instruction
  that compiler adds. Now SP is modified at enter/exit just like any others interrupts do.